Magnetic memory cell, magnetic memory device, and magnetic memory device manufacturing method

ABSTRACT

The present invention provides a magnetic memory device capable of reducing a loss of a magnetic field generated by currents flowing in a write line and performing writing stably, and a magnetic memory cell mounted on the magnetic memory device. Further, the invention provides a method for easily manufacturing such a magnetic memory device. A magnetic memory cell includes: stacked bodies each including a magneto-sensitive layer whose magnetization direction changes according to an external magnetic field, and constructed so that current flows in a direction perpendicular to a stack layer surface; and a toroidal magnetic layer disposed between the first and second stacked bodies so that the direction along the stack layer surface is set as an axial direction, and constructed so as to be penetrated by a plurality of conductors along the axial direction. Thus, strength reduction in a circulating magnetic field generated in a toroidal magnetic layer can be suppressed, and the magnetization direction of a magneto-sensitive layer in each of the first and second stacked bodies can be inverted by a smaller write current.

TECHNICAL FIELD

The present invention relates to a magnetic memory cell including amagnetoresistive device, a magnetic memory device having a plurality ofmagnetic memory cells and recording/reading information, and a method ofmanufacturing the magnetic memory device.

BACKGROUND ART

Conventionally, as general memories used for information processors suchas a computer and a communication device, volatile memories such as aDRAM (Dynamic Random Access Memory) and an SRAM (Static RAM) are used.The volatile memories have to be refreshed by always supplying currentto hold stored information. When the power source is turned off, all ofinformation is lost, so that a nonvolatile memory as means for recordinginformation has to be provided in addition to the volatile memory. Forexample, a flash EEPROM, a magnetic hard disk drive, or the like isused.

In the nonvolatile memories, as the speed of information processingincreases, increase in speed of an access is becoming an importantsubject. Further, as a portable information device is being rapidlyspread and the performance is becoming higher, information devicedevelopment aiming at so-called ubiquitous computing which means thatinformation processing can be performed everywhere at any time israpidly being progressed. Development of a nonvolatile memory adaptedfor higher-speed processing as a key device of such information devicedevelopment is in strong demand.

As a technique effective to increase the speed of the nonvolatilememory, a magnetic random access memory (MRAM) in which magnetic memoryelements each for storing information in accordance with themagnetization direction along the axis of easy magnetization of aferromagnetic layer are arranged in a matrix is known. The MRAM storesinformation by using a combination of the magnetization directions intwo ferromagnetic members. On the other hand, stored information is readby detecting a resistance change (that is, a change in current orvoltage) which occurs between the case where the magnetization directionis parallel to a reference direction and the case where themagnetization direction isantiparallel to the reference direction. Sincethe MRAM operates with the principle, it is important that theresistance change ratio is as high as possible to perform stable writingand reading in the MRAM.

The MRAM currently used in practice utilizes the giant magnetoresistive(GMR) effect. The GMR effect is a phenomenon such that when two magneticlayers are disposed so that their axes of easy magnetization areparallel to each other, in the case where the magnetization directionsof the layers are parallel to the axis of easy magnetization, theresistance value becomes the minimum. In the case where themagnetization directions of the layers antiparallel to the axis of easymagnetization, the resistance value becomes the maximum. An MRAM using aGMR device capable of obtaining such a GMR effect (hereinbelow,described as GMR-MRAM) is disclosed in, for example, U.S. Pat. No.5,343,422.

The GMR-MRAM has a coercive force difference type (pseudo spin valvetype) and an exchange bias type (spin valve type). In the MRAM of thecoercive force difference type, the GMR device has two ferromagneticlayers and a nonmagnetic layer sandwiched between the two ferromagneticlayers and, by using the difference between the coercive forces of thetwo ferromagnetic layers, information is written/read. In the case wherethe GMR device has a configuration of, for example, “nickel iron alloy(NiFe)/copper(Cu)/cobalt(Co)”, the resistance change rate is a smallvalue of about 6 to 8%. On the other hand, the MRAM of the exchange biastype, the GMR device has a pinned layer whose magnetization direction ispinned by antiferromagnetic coupling to an antiferromagnetic layer, afree layer whose magnetization direction changes according to anexternal magnetic field, and a nonmagnetic layer sandwiched between thepinned layer and the free layer. By using the difference between themagnetization direction of the pinned layer and the magnetizationdirection of the free layer, information is written/read. For example,the resistance change rate of the GMR device having a configuration of“platinum manganese (PtMn)/cobalt iron (CoFe)/copper (Cu)/CoFe” is about10% which is higher than that of the coercive force difference type.However, it is insufficient to achieve improvement in storing speed andaccess speed.

To solve the problems, an MRAM having a TMR device using tunnelingmagnetoresistive effect (TMR) (hereinbelow, written as “TMR-MRAM”) isproposed. The TMR effect is an effect such that the tunnel currentpassing through an insulating layer changes in accordance with relativeangles of the magnetization directions of two ferromagnetic layerssandwiching a very-thin insulating layer (tunnel barrier layer). Whenthe magnetization directions of the two ferromagnetic layers areparallel to each other, the resistance value becomes the minimum. Whenthe magnetization directions antiparallel to each other, the resistancevalue becomes the maximum. In the TMR-MRAM, when the TMR device has aconfiguration of, for example, “CoFe/aluminum oxide/CoFe”, theresistance change ratio is high as 40% and the resistance value is alsolarge. Consequently, the TMR-MRAM can be easily matched with asemiconductor device such as an MOSFET. Therefore, the TMR-MRAM caneasily obtain a higher output as compared with the GMR-MRAM, andimprovement in storage capacity and access speed is expected. In theTMR-MRAM, a method of storing information by changing the magnetizationdirection of a magnetic film of the TMR device by a current magneticfield generated by passing current to a conductor is known. As a methodof reading stored information, a method of passing current in adirection perpendicular to a tunnel barrier layer and detecting aresistance change in the TMR device is known. Techniques on the TMR-MRAMdisclosed in U.S. Pat. No. 5,629,922 and Japanese Patent Laid-open No.Hei 9-91949 and the like are known.

As described above, an MRAM using the TMR effect can achieve an outputhigher than that of the MRAM using the GMR effect. However, since anoutput voltage of even the MRAM using the TMR device achieving aresistance change rate of about 40% is tens mV, it is insufficient torealize a magnetic memory device of higher packing density.

FIG. 48 is a plan view showing the configuration in a magnetic memorydevice using the conventional TMR effect. FIG. 49 shows a sectionalconfiguration of the main part of the conventional magnetic memorydevice corresponding to FIG. 48. A write bit line 105 is orthogonal to aread word line 112 and a write word line 106 extending in parallel witheach other, and a TMR device 120 constructed by a first magnetic layer102, a tunnel burrier layer 103, and a second magnetic layer 104 isdisposed in an area sandwiched in the Z direction of the orthogonalportion. In such an MRAM of the type in which the write bit line 105 andthe write word line 106 are orthogonal to each other, the magnetizationdirection of the second magnetic layer 104 functioning as a free layercannot be sufficiently maintained as a whole, and it is difficult toperform sufficiently stable writing.

In the MRAM using the TMR effect, information is stored in each ofmemory cells by changing the magnetization direction of the magneticfilm by an induction field by current flowing in conductors arrangedorthogonal to each other, that is, current magnetic field. Since thecurrent magnetic field is an open magnetic field (which is notmagnetically confined in a specific area), the efficiency is low and anadverse influence on neighboring memory cells is also concerned.

Further, in the case of increasing integration of memory cells toachieve higher packing density of a magnetic memory device, it isessential to make a TMR device finer. However, it is feared thatdemagnetizing field increases as the aspect ratio (thickness/width inthe direction in the stack layer plane) of each of the magnetic layersin the TMR device becomes higher, the magnetic field intensity to changethe magnetization direction of the free layer increases, and largerwrite current is necessary.

DISCLOSURE OF THE INVENTION

The present invention has been achieved in consideration of suchproblems and a first object of the invention is to provide a magneticmemory device capable of reducing a loss of a magnetic field generatedby currents flowing in a write line and performing stable writing with acompact configuration, and a magnetic memory cell to be mounted on themagnetic memory device. A second object is to provide a magnetic memorydevice hardly exerting an adverse influence on an adjacent magneticmemory cell and a magnetic memory cell to be mounted on the magneticmemory device. A third object is to provide a high-speed andlarge-capacity magnetic memory device capable of obtaining a high signaloutput by using a pair of magnetoresistive devices and a magnetic memorycell to be mounted on the magnetic memory device. Further, a fourthobject is to provide a method for easily manufacturing such a magneticmemory device.

A magnetic memory cell of the invention includes: first and secondstacked bodies each including a magneto-sensitive layer whosemagnetization direction changes according to an external magnetic field,and constructed so that current flows in a direction perpendicular to astack layer surface, and disposed so that their stack layer surfacesface each other; and a toroidal magnetic layer disposed between thefirst and second stacked bodies so that the direction along the stacklayer surface is set as an axial direction, and constructed so as to bepenetrated by a plurality of conductors along the axial direction. The“external magnetic field” in the invention denotes a magnetic fieldgenerated by currents flowing in the plurality of conductors or acirculating magnetic field generated in the toroidal magnetic layer.“Toroidal” in the “toroidal magnetic layer” denotes a state where themagnetic layer completely surrounds each of the plurality of conductorspenetrating the inside magnetically and electrically continuously and isclosed in section in the direction crossing the plurality of conductors.Therefore, the toroidal magnetic layer allows to contain an insulator aslong as it is magnetically and electrically continuous. That is,although an insulator in which no current flows is not included, forexample, an oxide film formed in a manufacturing process may beincluded. The “axial direction” denotes an opening direction whenattention is paid to the toroidal magnetic layer single body, that is,the extending direction of the plurality of conductors penetrating theinside. The expression “(a toroidal magnetic layer) constructed so as tobe penetrated by a plurality of conductors” means that a plurality ofconductors penetrate an area or space surrounded by the toroidalmagnetic layer.

In the magnetic memory cell of the invention, with the configuration, aclosed magnetic path is formed by passing currents to the plurality ofconductors, so that the magnetization of each of the magneto-sensitivelayers in the first and second stacked bodies is inverted efficiently.

A magnetic memory device of the invention includes: a first write line;a second write line extending so as to cross the first write line; and amagnetic memory cell. The magnetic memory cell comprises: first andsecond stacked bodies each including a magneto-sensitive layer whosemagnetization direction changes according to an external magnetic field,and constructed so that current flows in a direction perpendicular to astack layer surface, and disposed so that their stack layer surfacesface each other; and a toroidal magnetic layer disposed between thefirst and second stacked bodies so that the direction along the stacklayer surface is set as an axial direction, and constructed so as to bepenetrated by the first and second write lines along the axialdirection.

In the magnetic memory device of the invention, with the configuration,a closed magnetic path is formed by passing currents to the first andsecond write lines, so that the magnetization of each of themagneto-sensitive layers in the first and second stacked bodies isinverted efficiently.

A method of manufacturing a magnetic memory device of the invention,including a first write line, a second write line extending so as tocross the first write line, and a magnetic memory cell having first andsecond stacked bodies including magneto-sensitive layers whosemagnetization directions change according to an external magnetic field,comprises the steps of: forming a second stack layer part as part of thesecond stacked body on a substrate provided with first and secondrectifying devices and electrically connecting the second rectifyingdevice and the second stack layer part; forming a bottom magnetic layerso as to cover at least the stack layer part and completing formation ofthe second stacked body; forming the first write line over the bottommagnetic layer via a first insulating film; forming the second writeline over the first write line via a second insulating film so as toinclude a portion in which the first and second write lines extendparallel to each other; forming a stack layer pattern forming a stacklayer pattern including the portion in which the first and second writelines extend parallel to each other while sandwiching the secondinsulating film by performing patterning by sequentially etching thesecond write line, the second insulating film, and the first write line;forming a toroidal magnetic layer by providing a top magnetic layer soas to surround the stack layer pattern via a third insulating film;forming a first stacked body by providing a first stack layer part in aposition corresponding to the second stacked body over the toroidalmagnetic layer and forming a magnetic memory cell having the first andsecond stacked bodies; and electrically connecting the first stackedbody and the first rectifying device.

In the method of manufacturing a magnetic memory device according to theinvention, by the above steps, a structure in which the first and secondstacked bodies disposed so that their stack layer surfaces face eachother are formed for the toroidal magnetic layer commonly provided canbe obtained. In this case, the state “the first and second write linesextend parallel to each other while sandwiching the second insulatingfilm” includes ±10° of an error range in manufacture.

In the magnetic memory cell and the magnetic memory device of theinvention, preferably, the first stacked body constructs a firstmagnetoresistive device in cooperation with the toroidal magnetic layer,and the second stacked body constructs a second magnetoresistive devicein cooperation with the toroidal magnetic layer. With the configuration,a pair of magnetoresistive devices sharing the toroidal magnetic layeris constructed, so that the space can be reduced more than the casewhere one toroidal magnetic layer is provided for one stacked body.

In the magnetic memory cell and the magnetic memory device of theinvention, preferably, each of the first and second stacked bodies iselectrically connected to the toroidal magnetic layer. With theconfiguration, in the first and second stacked bodies, currents flowingin the direction perpendicular to the stack layer face flow from themagneto-sensitive layer to the toroidal magnetic layer.

In the magnetic memory cell and the magnetic memory device of theinvention, the plurality conductors (first and second write lines)extend parallel to each other in an area penetrating the toroidalmagnetic layer. With the configuration, a synthetic magnetic fieldgenerated by passing currents to the plurality of conductors (first andsecond write lines) can be made larger than that in the case where theplurality of write lines (first and second write lines) cross eachother, and the magnetization in the magneto-sensitive layer can beinverted more efficiently.

In the magnetic memory cell and the magnetic memory device of theinvention, the plurality of conductors may be disposed so as to beadjacent to each other in a direction of a straight line passing throughthe first and second stacked bodies in an area penetrating the toroidalmagnetic layer, or may be disposed so as to be adjacent to each other ina direction orthogonal to a straight line passing through the first andsecond stacked bodies in an area penetrating the toroidal magneticlayer.

In the magnetic memory cell and the magnetic memory device of theinvention, preferably, magnetization directions of the magneto-sensitivelayers in the first and second stacked bodies change so as to beantiparallel to each other by a magnetic field generated by currentsflowing in the plurality of conductors (first and second write lines)penetrating the toroidal magnetic layer, and information is accordinglystored in the first and second stacked bodies. The expression “themagnetization directions are antiparallel to each other” includes notonly the case where the relative angle formed between the magnetizationdirections, that is, average magnetization directions of the magneticlayers is strictly 180 degrees but also the case where the relativeangle is deviated from 180 degrees only by a predetermined angle due toan error occurring in manufacture, an error caused when a perfectuniaxis cannot be obtained, and the like. “Information” denotes binaryinformation expressed by, generally, “0” and “1” by input/output signalsto/from a magnetic memory device or “high” and “low” by current valuesor voltage values.

In the magnetic memory cell and the magnetic memory device, in the firstand second stacked bodies, information is stored in a state where themagnetization directions of the magneto-sensitive layers areantiparallel to each other.

More concretely, either a first state or a second state is obtained. Inthe first state, one of a pair of magneto-sensitive layers in the firstand second stacked bodies is magnetized in a first direction, and theother is magnetized in a second direction antiparallel to the firstdirection. In the second state, one of the magneto-sensitive layers inthe pair is magnetized in the second direction and the other ismagnetized in the first direction. Preferably, information is stored inthe first and second stacked bodies in correspondence with the first andsecond states. At this time, the magnetizations of the magneto-sensitivelayers in the first and second stacked bodies can be in two states; astate where they are parallel to each other, and a state where they areantiparallel to each other. Binary information corresponds to the twostates.

In the magnetic memory cell and the magnetic memory device of theinvention, a pair of magneto-sensitive layers may construct part of thetoroidal magnetic layer. Further, a pair of magneto-sensitive layers mayinclude first and second magneto-sensitive parts constructed so as to bemagnetically exchange-coupled to each other, and the firstmagneto-sensitive part may construct part of the toroidal magneticlayer. In addition, a pair of first nonmagnetic conductive layers forantiferromagnetic-coupling a pair of first magneto-sensitive parts and apair of second magneto-sensitive parts may be disposed between the pairof first magneto-sensitive parts and the pair of secondmagneto-sensitive parts.

Further, in the magnetic memory cell and the magnetic memory device ofthe invention, each of the first and second stacked bodies includes: anonmagnetic layer; a first magnetic layer stacked on one side of thenonmagnetic layer and whose magnetization direction is pinned; and amagneto-sensitive layer stacked on the side opposite to the firstmagnetic layer, of the nonmagnetic layer, or includes; a nonmagneticlayer; a first magnetic layer stacked on one side of the nonmagneticlayer and whose magnetization direction is pinned; and a second magneticlayer stacked on the side opposite to the first magnetic layer, of thenonmagnetic layer and functioning as the second magneto-sensitive part,and information may be detected on the basis of currents flowing in thefirst and second stacked bodies. In this case, preferably, the firstmagnetic layer has a coercive force larger than that of the secondmagnetic layer. A third magnetic layer which is antiferromagnetic and isexchange-coupled to the first magnetic layer may be disposed on the sideopposite to the nonmagnetic layer of the first magnetic layer. A secondnonmagnetic conductive layer and a fourth magnetic layer which isantiferromagnetic-coupled to the first magnetic layer may be disposed inorder from the side of the first magnetic layer between the first andthird magnetic layers. In those cases, the nonmagnetic layer may be aninsulating layer which can produce a tunnel effect.

The magnetic memory device of the invention may further include a pairof first read lines which are connected to first and secondmagnetoresistive devices and supply read current to the magnetoresistivedevices, and information is read from a magnetic memory cell on thebasis of the current flowing in the stacked bodies. The expression“connected to” in the magnetic memory cell of the invention indicates astate where components are connected to each other at least electricallybut do not have to be directly connected to each other physically.

In the magnetic memory device, information is read by using thephenomenon that current values of currents passed in the directionperpendicular to the stack layer face of the stacked bodies inaccordance with the relative magnetization directions of themagneto-sensitive layers in the pair of the magnetoresistive devices.

Preferably, read current is supplied from the pair of first read linesto the first and second stacked bodies and, on the basis of thedifference between the pair of read current values, information is readfrom the magnetic memory cell. In this method, the read currents aredifferentially output, so that noise occurring in each of the first readlines and an offset component included in an output value of each of themagnetoresistive devices is cancelled off and removed.

Preferably, the magnetic memory device according to the inventionincludes: first and second rectifying devices provided between a pair offirst read lines and the first and second stacked bodies on each ofcurrent paths of the read currents supplied to the first and secondstacked bodies; and a second read line for leading the read currentspassed through the first and second stacked bodies to the ground.

The “rectifying device” of the invention denotes a device for passingcurrent only in one direction and checking passage of current in anopposite direction. The “current path” denotes a whole path in which theread current passes so as to be flowed in a stacked body, passes throughthe stacked body, and flows out from the stacked body. The rectifyingdevice has a rectifying action of passing current only in an earthdirection (second read line side) on the current path. By the rectifyingdevice, a round of the current from another magnetic memory cellconnected to a common second read line, flowing toward a magnetic memorycell to be read can be avoided, and the current can be prevented frompassing from one of the stacked bodies in a magnetic memory cell to beread to the other stacked body and reaching the first read line. As therectifying device, preferably, a Schottky diode, a PN junction diode, abipolar transistor, or a MOS transistor is employed.

Further, in the magnetic memory device of the invention, preferably, thesecond stacked body, the toroidal magnetic layer, and the first stackedbody are disposed in order on a substrate provided with the first andsecond rectifying devices, and the first and second rectifying devicesand the first and second stacked bodies are electrically connected toeach other, respectively. In this case, a bipolar transistor may be usedas the rectifying device and the emitter in the bipolar transistor andthe magnetoresistive device can be electrically connected to each other.Alternately, a MOS transistor may be used as the rectifying device, andthe source in the MOS transistor can be electrically connected to themagnetoresistive device, or a Schottky diode may be used as therectifying device having an epitaxial layer and a metal layer in orderfrom the substrate side, and a Schottky barrier may be formed betweenthe epitaxial layer and the metal layer.

In the method of manufacturing a magnetic memory device of theinvention, in the stacked layer pattern forming step, preferably, thestack layer pattern is formed in a self aligned manner by selectivelyetching the second insulating film and the first write line by using thesecond write line as a mask. By the method, processing with highalignment precision can be realized and, further, the wholemanufacturing process can be simplified.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a block diagram showing a general configuration of a magneticmemory device according to a first embodiment of the invention.

FIG. 2 is a plan view showing the configuration of a write line of themagnetic memory device illustrated in FIG. 1.

FIG. 3 is a partial plan view showing the configuration of a main partof a memory cell group in the magnetic memory device illustrated in FIG.1.

FIG. 4 is a perspective view showing the configuration of a main part ofthe memory cell group in the magnetic memory device illustrated in FIG.1.

FIG. 5 is a cross section showing the configuration in a plane takenalong line V-V of the magnetic memory cell illustrated in FIG. 3.

FIG. 6 is another partial plan view showing the configuration of themain part of the memory cell group in the magnetic memory deviceillustrated in FIG. 1.

FIG. 7 is a cross section showing the configuration in a plane takenalong line VII-VII of the memory cell illustrated in FIG. 6.

FIG. 8 is a circuit diagram showing the circuit configuration of themagnetic memory device illustrated in FIG. 1.

FIGS. 9A and 9B are explanatory diagrams showing the relation between awrite current direction and a circulating magnetic field direction(magnetization direction) in the sectional configuration of the memorycell illustrated in FIG. 5.

FIGS. 10A and 10B are partial enlarged views of the circuitconfiguration illustrated in FIG. 8.

FIG. 11 is an enlarged cross section showing a process in a method ofmanufacturing the magnetic memory device illustrated in FIG. 1.

FIG. 12 is an enlarged cross section showing a process subsequent toFIG. 11.

FIG. 13 is an enlarged cross section showing a process subsequent toFIG. 12.

FIG. 14 is an enlarged cross section showing a process subsequent toFIG. 13

FIG. 15 is an enlarged cross section showing a process subsequent toFIG. 14.

FIG. 16 is an enlarged cross section showing a process subsequent toFIG. 15.

FIG. 17 is an enlarged cross section showing a process subsequent toFIG. 16.

FIG. 18 is an enlarged cross section showing a process subsequent toFIG. 17.

FIG. 19 is an enlarged cross section showing a process subsequent toFIG. 18.

FIG. 20 is an enlarged cross section showing a process subsequent toFIG. 19.

FIG. 21 is an enlarged cross section showing a process subsequent toFIG. 20.

FIG. 22 is an enlarged cross section showing a process subsequent toFIG. 21.

FIG. 23 is an enlarged cross section showing a process subsequent toFIG. 22.

FIG. 24 is an enlarged cross section showing a process subsequent toFIG. 23.

FIG. 25 is an enlarged cross section showing a process subsequent toFIG. 24.

FIG. 26 is an enlarged cross section showing a process subsequent toFIG. 25.

FIG. 27 is an enlarged cross section showing a process subsequent toFIG. 26.

FIG. 28 is an enlarged cross section showing a process subsequent toFIG. 27.

FIG. 29 is an enlarged cross section showing a process subsequent toFIG. 28.

FIG. 30 is an enlarged cross section showing a process subsequent toFIG. 29.

FIG. 31 is a cross section of a magnetic memory cell in a magneticmemory device according to a second embodiment of the invention.

FIG. 32 is a perspective view showing the configuration of a main partof a memory cell group in the magnetic memory device illustrated in FIG.31.

FIG. 33 is a partial plan view showing the configuration of a main partof the memory cell group in the magnetic memory device illustrated inFIG. 31.

FIG. 34 is a cross section showing the configuration in a section takenalong line XXXIV-XXXIV of the memory cell illustrated in FIG. 33.

FIGS. 35A and 35B are explanatory diagrams showing the relation betweena write current direction and a circulating magnetic field direction(magnetization direction) in the sectional configuration of the memorycell illustrated in FIG. 31.

FIGS. 36A and 36B are cross sections showing the configuration of a mainpart in a magnetic memory device according to third and fourthembodiments of the invention.

FIGS. 37A and 37B are cross sections showing the configuration of a mainpart in modifications (first and second modifications) of the magneticmemory devices according to the first and second embodiments of theinvention.

FIGS. 38A and 38B are cross sections showing the configuration of a mainpart in modifications (third and fourth modifications) of the magneticmemory devices according to the third and fourth embodiments of theinvention.

FIGS. 39A and 39B are cross sections showing the configuration of a mainpart in other modifications (fifth and sixth modifications) of themagnetic memory devices according to the third and fourth embodiments ofthe invention.

FIGS. 40A and 40B are cross sections showing the configuration of a mainpart in other modifications (seventh and eighth modifications) of themagnetic memory devices according to the first and second embodiments ofthe invention.

FIG. 41 is a partial enlarged view showing a modification of arectifying device in the circuit configuration illustrated in FIG. 8.

FIG. 42 is a partial cross section showing a sectional configuration ina modification of the rectifying device illustrated in FIG. 41.

FIG. 43 is a circuit diagram showing a general circuit configuration ina modification of the rectifying device illustrated in FIG. 41.

FIG. 44 is a partial enlarged view showing another modification of therectifying device in the circuit configuration illustrated in FIG. 8.

FIG. 45 is a circuit diagram showing a general circuit configuration ofanother modification of the rectifying device illustrated in FIG. 44.

FIG. 46 is a circuit diagram showing a circuit configuration as acomparative example corresponding to the circuit configurationillustrated in FIG. 8.

FIG. 47 is a cross section showing the configuration of a main part of amagnetic memory device corresponding to the circuit configurationsillustrated in FIGS. 38A and 38B.

FIG. 48 is a plan view illustrating the configuration of a conventionalmagnetic memory device.

FIG. 49 is a cross section illustrating the configuration of a main partof the conventional magnetic memory device.

BEST MODE FOR CARRYING OUT THE INVENTION

Embodiments of the invention will be described in detail hereinbelow byreferring to the drawings.

First Embodiment

First, by referring to FIGS. 1 to 7, the configuration of a magneticmemory device according to a first embodiment of the invention will bedescribed.

FIG. 1 is a conceptual diagram showing a general configuration of amagnetic memory device in the embodiment. The magnetic memory device hasan address buffer 51, a data buffer 52, a control logic portion 53, amemory cell group 54, a first drive control circuit portion 56, a seconddrive control circuit portion 58, external address input terminals A0 toA20, and external data terminals D0 to D7.

The memory cell group 54 has a matrix structure in which a number ofmemory cells 1 each having a pair of tunneling magnetoresistive devices(hereinbelow, called TMR devices) are arranged in a word line direction(X direction) and a bit line direction (Y direction) which areorthogonal to each other. The memory cell 1 is the minimum unit forstoring data in the magnetic memory device and is a concrete examplecorresponding to a “magnetic memory cell” in the invention. The memorycell 1 will be described in detail later.

The first drive control circuit portion 56 has an address decodercircuit 56A, a sense amplification circuit 56B, and a current drivecircuit 56C in the Y direction. The second drive control circuit portion58 has an address decoder circuit 58A, a constant current circuit 58B,and a current drive circuit 58C in the X direction.

The address decoder circuits 56A and 58A are to select a word decodeline 72 which will be described later and a bit decode line 71 accordingto an input address signal. The sense amplification circuit 56B and theconstant current circuit 58B are circuits driven at the time ofperforming reading operation. The current drive circuits 56C and 58C arecircuits driven at the time of performing writing operation.

The sense amplification circuit 56B and the memory cell group 54 areconnected to each other via a plurality of bit decode lines 71 (whichwill be described later) in which the sense current flows at the time ofreading operation. Similarly, the constant current circuit 58B and thememory cell group 54 are connected to each other via a plurality of worddecode lines 72 (which will be described later) in which the sensecurrent flows at the time of reading operation.

The current drive circuit 56C and the memory cell group 54 are connectedto each other via write bit lines 5 (which will be described later)necessary at the time of writing operation. Similarly, the current drivecircuit 58C and the memory cell group 54 are connected to each other viawrite word lines 6 (which will be described later) necessary at the timeof writing operation.

The address buffer 51 has the external address input terminals A0 to A20and is connected to the Y-direction address decoder circuit 56A in thefirst drive control circuit portion 56 via a Y-direction address line 57and to the X-direction address decoder circuit 58A in the second drivecontrol circuit portion 58 via an X-direction address line 55. Theaddress buffer 51 receives an address signal from the outside via theexternal address input terminals A0 to A20 and amplifies the addresssignal to a voltage level required in the Y-direction address decodercircuit 56A and the X-direction address decoder circuit 58B by a bufferamplifier (not shown) provided in the address buffer 51. Further, theaddress buffer 51 functions to divide the amplified address signal intotwo signals and output the signals to the Y-direction address decodercircuit 56A via the Y-direction address line 57 and to the X-directionaddress decoder circuit 58A via the X-direction address line 55.

The data buffer 52 is constructed by an input buffer 52A and an outputbuffer 52B, has the external data terminals D0 to D7, is connected tothe control logic portion 53, and is operated by an output controlsignal 53A from the control logic portion 53. The input buffer 52A isconnected to the Y-direction current drive circuit 56C in the firstdrive control circuit portion 56 and the X-direction current drivecircuit 58C in the second drive control circuit portion 58 via aY-direction write data bus 61 and an X-direction write data bus 60,respectively. At the time of performing an operation of writing data tothe memory cell group 54, the input buffer 52A functions to receivesignal voltages of the external data terminals D0 to D7, amplify thesignal voltage to a required voltage level by an internal bufferamplifier (not shown), and transmit the resultant voltage to theX-direction current drive circuit 58C and the Y-direction current drivecircuit 56C via the X-direction write data bus 60 and the Y-directionwrite data bus 61, respectively. The output buffer 52B is connected tothe sense amplification circuit 56B via a Y-direction read data bus 62.At the time of reading an information signal stored in the memory cellgroup 54, the output buffer 52B functions to amplify the informationsignal supplied from the sense amplification circuit 56B by aninternally provided buffer amplifier (not shown) and to output theresultant signal with low impedance to the external data terminals D0 toD7.

The control logic portion 53 has a chip select terminal CS and a writeenable terminal WE and is connected to the data buffer 52. The controllogic portion 53 functions to receive a signal voltage from the chipselect terminal CS for selecting a memory cell to be read/written fromthe group 54 of memory cells and a signal voltage from the write enableterminal WE for outputting a write permit signal and to output theoutput control signal 53A to the data buffer 52.

The configuration related to information writing operation in themagnetic memory device of the embodiment will now be described.

FIG. 2 is a conceptual diagram showing a planar configuration of a mainpart related to the writing operation in the memory cell group 54. Asshown in FIG. 2, the magnetic memory device of the embodiment includesthe plurality of write bit lines 5 and a plurality of write word lines 6extending so as to cross the plurality of write bit lines 5. Each regionwhere the write bit line 5 and the write word line 6 cross each otherincludes a parallel part 10 in which the write bit line 5 and the writeword line 6 extend parallel with each other. Concretely, as shown inFIG. 2, the write word lines 6 extend in the X direction in arectangular wave shape and the write bit lines 5 extend in the Ydirection linearly. The rising and falling portions of the rectangularwave shape of the write word lines 6 form the plurality of parallelparts 10 in cooperation with the write bit lines 5. The memory cell 1 isprovided in each of the regions where the write bit lines 5 and thewrite word lines 6 cross each other so as to include at least a part ofthe parallel parts 10. The state where the memory cell 1 is provided inthe cross region includes the case where the memory cell 1 is providedadjacent to the intersecting point. Each of the memory cells 1 isconstructed by TMR devices 1 a and 1 b. The TMR devices 1 a and 1 b area concrete example of “a pair of magnetoresistive devices” of theinvention.

To the write bit line 5 and the write word line 6, currents from theX-direction current drive circuit 58C and the Y-direction current drivecircuit 56C flow, respectively. For example, as shown by the arrows inFIG. 2, when the direction of current flowing in the write bit line 5 isset as −Y direction (from the top to the bottom in the drawing sheet),it is desirable to set the direction of current flowing in the writeword line 6 as +X direction as a whole (from left to right in thedrawing sheet). By the setting, the direction of current in the writebit line 5 and that in the write word line 6 passing through the TMRdevices 1 a and 1 b become parallel with each other.

FIG. 3 shows the planar configuration of the main part of the memorycell group 54 more specifically. The write bit lines 5, write word lines6, and memory cells 1 shown in FIG. 3 correspond to those in FIG. 2. Thememory cell 1 is disposed in the parallel part 10 of the write bit line5 and the write word line 6 along the Y direction. A pair of TMR devices1 a and 1 b constructing the memory cell 1 have a stacked body S20 (S20a and S20 b) each including a magneto-sensitive layer, and a toroidalmagnetic layer 4. The magnetization direction of the magneto-sensitivelayer changes according to the magnetic field generated by the currentsflowing in the write bit line 5 and the write word lines 6 in theparallel part 10 (that is, the external magnetic field in the toroidalmagnetic layer 4). In this case, the write bit line 5 and the write wordline 6 in the parallel part 10 are provided almost in the matchedposition in the XY plane but are disposed with a predetermined intervalin the Z direction and are electrically insulated from each other.

At both ends of each write bit line 5, write bit line lead electrodes 42are provided. One of the write bit line lead electrodes 42 is connectedto the Y-direction current drive circuit 56C and the other is connectedso as to be finally grounded. Similarly, write word line lead electrodes41 are provided at both ends of each write word line 6. One of the writeword line lead electrodes 41 is connected to the X-direction currentdrive circuit 58C and the other is connected so as to be finallygrounded.

FIG. 4 is an enlarged perspective view of the memory cell 1. The writeword line 6 as a first write line and the write bit line 5 as a secondwrite line extend parallel with each other and penetrate the toroidalmagnetic layer 4. The write word line 6, write bit line 5, and toroidalmagnetic layer 4 are electrically insulated from each other via aninsulating film 7. The stacked layer parts 20 a and 20 b are disposed onthe surface of the toroidal magnetic layer 4 so that their stack layersurfaces face each other. Stacked bodies S20 a and S20 b in a pairincluding the pair of stacked layer parts 20 a and 20 b are electricallyconnected to conductive layers 36 a and 36 b (which will be describedlater), respectively. The pair of conductive layers 36 a and 36 b is apart of a pair of Schottky diodes 75 a and 75 b (which will be describedlater), and the other ends of the Schottky diodes 75 a and 75 b areconnected to read bit lines 33 a and 33 b (not shown) extending in the Ydirection.

FIG. 5 shows a sectional configuration taken along line V-V of thememory cell 1 illustrated in FIG. 3. In order to distinguish the memorycell from a memory cell 1H as a modification of the embodiment, whichwill be described later, the memory cell 1 here is indicated as a memorycell 1P.

As shown in FIG. 5, the memory cell 1P includes: the stacked bodies S20a and S20 b each including a magneto-sensitive layer whose magnetizationdirection changes according to the external magnetic field andconstructed so that current flows in the direction perpendicular to thestack layer surface, which are disposed so that their stack layersurfaces face each other; and the toroidal magnetic layer 4 disposedcommonly between the stacked bodies S20 a and S20 b by using thedirection along the stack layer surface as the axial direction andthrough which the write word line 6 and the write bit line 5 extendalong the axial direction. The stacked body S20 a constructs the TMRdevice 1 a in cooperation with the toroidal magnetic layer 4, and thestacked body S20 b constructs the TMR device 1 b in cooperation with thetoroidal magnetic layer 4. In the memory cell 1P, the write word line 6and the write bit line 5 are arranged so as to be adjacent to each otherin the direction of the straight line passing through the stacked bodiesS20 a and S20 b in the area where the write word line 6 and the writebit line 5 penetrate the toroidal magnetic layer 4. The stacked body S20a is a concrete example corresponding to a “first stacked body” in theinvention, and the other stacked body S20 b is a concrete examplecorresponding to a “second stacked body” in the invention.

The magneto-sensitive layer is constructed by a pair of connection parts14 a and 14 b constructing a part of the toroidal magnetic layer 4 and apair of second magnetic layers 8 a and 8 b which will be describedlater. The pair of connection parts 14 a and 14 b and the pair of secondmagnetic layers 8 a and 8 b magnetically exchange-coupled to each other.The connection parts 14 a and 14 b are a concrete example of a “firstmagneto-sensitive part” in the invention, and one of the second magneticlayers 8 a and 8 b is a concrete example of a “second magneto-sensitivepart” in the invention.

The stacked bodies S20 a and S20 b are constructed by stack layer parts20 a and 20 b and connection parts 14 a and 14 b, respectively. Thestacked bodies S20 a and S20 b include, in order from the side of thetoroidal magnetic layer 4 (connection parts 14 a and 14 b), the secondmagnetic layers 8 a and 8 b, tunnel barrier layers 3 a and 3 b, andfirst magnetic layers 2 a and 2 b whose magnetization direction isfixed, respectively, and constructed so that current flows in thedirection perpendicular to the stack layer face. As described above, thesecond magnetic layers 8 a and 8 b function as magneto-sensitive layerstogether with the pair of connection parts 14 a and 14 b in the toroidalmagnetic layer 4. The tunnel barrier layer 3 is a concrete examplecorresponding to a “nonmagnetic layer” in the invention. In FIG. 5, toclarify the configuration of the stacked bodies S20 a and S20 b, thestacked bodies S20 a and S20 b are exaggerated so as to be largerrelative to the peripheral parts.

In the stacked bodies S20 a and S20 b, when a voltage is applied in thedirection perpendicular to the layer stack face between the firstmagnetic layers 2 a and 2 b and the second magnetic layers 8 a and 8 b,for example, electrons in the first magnetic layers 2 a and 2 b passthrough the tunnel barrier layers 3 a and 3 b and move to the secondmagnetic layers 8 a and 8 b, and tunnel current flows. The tunnelcurrent changes according to a relative angle between the spin in thefirst magnetic layers 2 a and 2 b in the interface with the tunnelbarrier layers 3 a and 3 b and the spin in the second magnetic layers 8a and 8 b. Specifically, when the spin of the first magnetic layers 2 aand 2 b and that of the second magnetic layers 8 a and 8 b are parallelto each other, the resistance value becomes the minimum. When theyantiparallel to each other, the resistance value becomes the maximum. Byusing the resistance values, the magneto-resistance change ratio (MRratio) is defined as Formula (1).MR ratio=dR/R Formula  (1)

where “dR” denotes the difference between the resistance value in thecase where the spins are parallel to each other and that in the casewhere the spins are antiparallel to each other, and “R” indicates theresistance value in the case where the spins are parallel to each other.

The resistance value against the tunnel current (hereinbelow, calledtunnel resistance Rt) strongly depends on the thickness T of the tunnelbarrier layers 3 a and 3 b. In a low voltage region, as shown in Formula(2), the tunnel resistance Rt exponentially increases with the thicknessT of the tunnel barrier layers 3 a and 3 b.Rt∝ exp(2χ^(T)),χ={8π² m*(φ·Ef)^(0.5) }/h  Formula (2)

where φ denotes the height of the barrier, “m*” denotes effective massof electrons, “Ef” indicates Fermi energy, and h indicates a Planck'sconstant. Generally, in a memory element using the TMR device, to matchwith a semiconductor device such as a transistor, it is said that theproper tunnel resistance Rt is about tens kΩ·(μm)². However, to realizehigher packing density in the magnetic memory device and higheroperating speed, the tunnel resistance Rt is set to, preferably, 10kΩ·(μm)² or less, more preferably, 1kΩ·(μm)² or less. Therefore, torealize the tunnel resistance Rt, it is desirable to set the thickness Tof the tunnel barrier layers 3 a and 3 b to 2 nm or less, morepreferably, 1.5 nm or less.

By reducing the thickness T of the tunnel barrier layers 3 a and 3 b,the tunnel resistance Rt can be reduced but, on the other hand, a leakcurrent occurs due to roughness of the junction interfaces with thefirst magnetic layers 2 a and 2 b and the second magnetic layers 8 a and8 b so that the MR ratio deteriorates. To prevent this, the thickness Tof the tunnel barrier layers 3 a and 3 b has to be large to an extentthat leak current does not flow. Concretely, the thickness T isdesirably 0.3 nm or larger.

Desirably, the stacked bodies S20 a and S20 b shown in FIG. 5 have acoercive force differential structure and the coercive force of thefirst magnetic layers 2 a and 2 b is larger than that of the secondmagnetic layers 8 a and 8 b. Concretely, the coercive force of the firstmagnetic layers 2 a and 2 b is preferably larger than (50/4π)×10³A/m,more preferably, (100/4π)×10³ A/m. With the configuration, themagnetization direction of the first magnetic layers 2 a and 2 b can beprevented from being influenced by unnecessary magnetic fields such asexternal disturbance magnetic fields or the like. The first magneticlayers 2 a and 2 b are made of, for example, cobalt iron alloy (CoFe)and have a thickness of 5 nm. Alternately, cobalt (Co), cobalt platinumalloy (CoPt), nickel iron cobalt alloy (NiFeCo), or the like can beapplied to the first magnetic layers 2 a and 2 b. The second magneticlayers 8 a and 8 b are made of, for example, cobalt (Co), cobalt ironalloy (CoFe), cobalt platinum alloy (CoPt), nickel iron alloy (NiFe), ornickel iron cobalt alloy (NiFeCo). The axes of easy magnetization of thefirst magnetic layers 2 a and 2 b and the second magnetic layers 8 a and8 b are preferably parallel to each other so that the magnetizationdirection of the first magnetic layers 2 a and 2 b and that of thesecond magnetic layers 8 a and 8 b are stabilized in a parallelorantiparallel state.

The toroidal magnetic layer 4 extends so as to surround at least a partof the parallel part 10 in the write bit line 5 and the write word line6 and are constructed so that a circulating magnetic field is generatedin the toroidal magnetic layer 4 by current flowing in the parallel part10. The magnetization direction of the toroidal magnetic layer 4 isinverted by the circulating magnetic field. The connection parts 14 aand 14 b in the toroidal magnetic layer 4 and the second magnetic layers8 a and 8 b adjacent to the connection parts 14 a and 14 b function asstorage layers for storing information. The toroidal magnetic layer 4 ismade of, for example, nickel iron alloy (NiFe) and, desirably, thecoercive force of the connection parts 14 a and 14 b is smaller thanthat of the first magnetic layers 2 a and 2 b within the range of(100/4π)×10³ A/m or less. With the coercive force exceeding (100/4π)×10³A/m, the TMR films 20 a and 20 b themselves may deteriorate due to heatgeneration caused by increase in write current. Further, when thecoercive force of the connection parts 14 a and 14 b becomes equal to orlarger than that of the first magnetic layers 2 a and 2 b, the writecurrent increases, the magnetization directions of the first magneticlayers 2 a and 2 b as magnetization pinned layers are changed, and theTMR devices 1 a and 1 b as memory elements are destroyed. The magneticpermeability of the toroidal magnetic layer 4 is preferably high to makethe current magnetic field generated by the write bit line 5 and thewrite word line 6 concentrated on the toroidal magnetic layer 4. To beconcrete, the magnetic permeability is 2,000 or higher and, morepreferably, 6,000 or higher.

Each of the write bit line 5 and the write word line 6 has a structurein which a film of titanium (Ti) having a thickness of 10 nm, a film oftitanium nitride (TiN) having a thickness of 10 nm, and a film ofaluminum (Al) having a thickness of 500 nm are sequentially stacked. Thewrite bit line 5 and the write word line 6 are electrically insulatedfrom each other by the insulating film 7. The write bit line 5 and thewrite word line 6 may be made of at least one of, for example, aluminum(Al), copper (Cu), and tungsten (W). More concrete operation of writinginformation to the memory cell 1 by using the write bit line 5 and thewrite word line 6 will be described later.

The configuration related to information reading operation will now bedescribed. FIG. 6 shows a planar configuration of a main part related tothe reading operation in the memory cell group 54 and corresponds toFIG. 3.

As shown in FIG. 6, each memory cell 1 is disposed at each of theintersecting points of the plurality of read word lines 32 and theplurality of read bit lines 33 in the XY plane. Concretely, the read bitline 33 is constructed by a pair of read bit lines 33 a and 33 b, andthe memory cell 1 is provided in an area where it crosses a read wordline 32 in an area between the read bit lines 33 a and 33 b. The pair ofread bit lines 33 a and 33 b are electrically connected to the pair ofthe stack layer parts 20 a and 20 b via a pair of Schottky diodes 75 aand 75 b (which will be described later). One of the read word lines 32is electrically connected to the toroidal magnetic layer 4 in the memorycell 1 via a connection layer or the like. The pair of read bit lines 33a and 33 b supply read current to the pair of TMR devices 1 a and 1 b,respectively, in each memory cell 1. One of the read word lines 32 leadsthe read current flowed in each of the TMR devices 1 a and 1 b to theground. At both ends of each of the read bit lines 33 a and 33 b, readbit line lead electrodes 44 a and 44 b are provided. On the other hand,at both ends of each of the read word lines 32, read word line leadelectrodes 43 are provided. The read bit line 33 is a concrete exampleof a “first read line” of the invention, and the read word line 32 is aconcrete example of a “second read line” of the invention.

FIG. 7 is a cross section taken along line VII-VII shown in FIG. 6. Asshown in FIG. 7, the magnetic memory device of the embodiment isconstructed so that, in a region including the memory cell 1, a pair ofstacked bodies 20 a and 20 b and the toroidal magnetic layer 4 areformed in order over the substrate 31 provided with the pair of Schottkydiodes 75 a and 75 b (hereinbelow, simply called diodes 75 a and 75 b)functioning as a rectifier. The diode 75 a is a concrete example of a“first rectifying device” of the invention, and the other diode 75 b isa concrete example of a “second rectifying device” of the invention.

The pair of diodes 75 a and 75 b have the conductive layers 36 a and 36b, an epitaxial layer 37, and a substrate 38 in order from the side ofthe memory cell 1. Between the conductive layers 36 a and 36 b and theepitaxial layer 37, a Schottky barrier is formed. The diodes 75 a and 75b do not have parts electrically connected to each other except forconnection to the toroidal magnetic layer 4 while sandwiching the stacklayer parts 20 a and 20 b. The substrate 38 is an n-type silicon wafer.Generally, in the n-type silicon wafer, an impurity of phosphorus (P) isdiffused. As the substrate 38, a wafer of an n⁺⁺ type obtained by beinghighly doped with phosphorus is used. In contrast, as the epitaxiallayer 37, a wafer of the n-type obtained by being lightly doped withphosphorus is used. By making the epitaxial layer 37 as an n-typesemiconductor and the conductive layers 36 a and 36 b made of a metalcome into contact with each other, a bandgap is created and a Schottkybarrier is formed. Further, the pair of diodes 75 a and 75 b isconnected to the read bit lines 33 a and 33 b, respectively, via aconnection layer 33T.

Referring now to FIG. 8, the circuit configuration related to thereading operation in the magnetic memory device of the embodiment willbe described.

FIG. 8 is a configuration diagram of a circuit system constructed by thememory cell group 54 and a readout circuit. In the read circuit system,the memory cell 1 is of a differential amplifier type constructed by thepair of TMR devices 1 a and 1 b. Information in the memory cell 1 isread by outputting a differential value of read currents passed to thestacked bodies S20 a and S20 b in the TMR devices 1 a and 1 b,respectively, (currents passed from the read bit lines 33 a and 33 b tothe stacked bodies S20 a and S20 b and output to the common read wordline 32).

In FIG. 8, a unit readout circuit 80 (. . . , 80 n, 80 n+1, . . . ) as aunit of repetition of the read circuit is constructed by the memorycells 1 of each bit line in the memory cell group 54 and a part of thereadout circuit including the sense amplification circuit 56B, and theunit readout circuits 80n are arranged in the bit line direction. Eachof the unit readout circuits 80 n is connected to the Y-directionaddress decoder circuit 56A via the bit decode line 71 (. . . , 71 n, 71n+1, . . . ) and is connected to the output buffer 52B via theY-direction read data bus 62.

In the memory cell group 54, the read word lines 32 (. . . , 32 m, 32m+1, . . . ) extending in the X direction and the pair of read bit lines33 a and 33 b extending in the Y direction are arranged in a matrix.Each of the memory cells 1 is disposed at a position intersecting withthe read word line 32 in a region sandwiched by the pair of read bitlines 33 a and 33 b. One ends of the stacked bodies S20 a and S20 b ineach memory cell 1 are connected to the read bit lines 33 a and 33 b viathe pair of diodes 75 a and 75 b, respectively, and the other ends areconnected to the common read word line 32.

One end of each read word line 32 is connected to a read switch 83 (. .. , 83 m, 83 m+1, . . . ) via the read word line lead electrode 43 andis also connected to the common constant current circuit 58B. Each readswitch 83 is connected to the X-direction address decoder circuit 58Avia the word decode line 72 (. . . , 72 m, 72 m+1, . . . ). The readswitch 83 is made conductive when a selection signal from theX-direction address decoder circuit 58A is supplied. The constantcurrent circuit 58B has the function of making the current flowing inthe read word line 32 constant.

One end of each of the read bit lines 33 a and 33 b is connected to thesense amplification circuit 56B via the read bit line lead electrodes 44a and 44 b, and the other end is finally grounded. The senseamplification circuit 56B is provided per unit readout circuit 80 andhas the function of receiving the potential difference between the pairof read bit lines 33 a and 33 b in each unit readout circuit 80 andamplifying the potential difference. The sense amplification circuit 56Bis connected to the output line 82 (. . . , 82 n, 82 n+1, . . . ) and isfinally connected to the output buffer 52B via the Y-direction read databus 62.

The operation in the magnetic memory device of the embodiment will nowbe described.

First, by referring to FIG. 2 and FIGS. 9A and 9B, the operation ofwriting information in the memory cell 1P will be described. FIGS. 9Aand 9B express the relation between the write current direction and thecirculating magnetic field direction (magnetization direction) in thesectional configuration of the memory cell 1P shown in FIG. 5. Thearrows indicated in magnetic layers in FIGS. 9A and 9B indicate themagnetization directions of the magnetic layers. With respect to thetoroidal magnetic layer 4, the magnetic field directions are also shown.The magnetization of the first magnetic layers 2 a and 2 b is fixed tothe −X direction.

FIG. 9A shows the case where write current flows in the same directionto the write bit line 5 and the write word line 6 which extend in thememory cell 1 and are parallel with each other. FIG. 9A corresponds tothe write current direction shown in FIG. 2. FIG. 9A shows a case wherewrite current flows from the depth to this side in the directionperpendicular to the drawing sheet (to the −Y direction) in the memorycell 1P, and a circulating magnetic field 34 is generated in thecounterclockwise direction in the toroidal magnetic layer 4. In thiscase, the magnetization direction of the connection part 14 a and thesecond magnetic layer 8 a is the −X direction, and the magnetizationdirection of the connection part 14 b and the second magnetic layer 8 bis the +X direction. FIG. 9B corresponds to the case where thedirections of current flowing in the write bit line 5 and the write wordline 6 are opposite to those shown in FIG. 9A. Specifically, FIG. 9Bshows a case where write current flows from this side to the depth inthe direction perpendicular to the drawing sheet (to the +Y direction)in the memory cell 1P, the circulating magnetic field 34 is generated inthe clockwise direction in the toroidal magnetic layer 4. In this case,the magnetization direction of the connection part 14 a and the secondmagnetic layer 8 a is the +X direction, and the magnetization directionof the connection part 14 b and the second magnetic layer 8 b is the −Xdirection.

As obvious from FIGS. 9A and 9B, according to the direction of thecirculating magnetic field 34 generated by the currents flowing in thewrite bit line 5 and the write word line 6 penetrating the toroidalmagnetic layer 4, the magnetization directions of the second magneticlayers 8 a and 8 b in the pair of TMR-devices 1 a and 1 b change so asto be opposite to each other. By using the phenomenon, information canbe stored in the memory cell 1.

To be specific, when current flows in the same direction in the writebit line 5 and the write word line 6, the magnetization direction of thetoroidal magnetic layer 4 is inverted and, accompanying the inversion,the magnetization direction of the second magnetic layer 8 changes,thereby enabling binary information of “0” or “1” to be stored. In thecase where “0” corresponds to, for example, the state of FIG. 9A,specifically, the state where the second magnetic layer 8 a in the pairof second magnetic layers 8 is magnetized in the −X direction and theother second magnetic layer 8 b is magnetized in the +X direction, “1”corresponds to the state of FIG. 9B, specifically, the state where thesecond magnetic layer 8 a is magnetized in the +X direction and theother second magnetic layer 8 b is magnetized in the −X direction. The−X direction is a concrete example of a “first direction” in theinvention, and the +X direction is a concrete example of a “seconddirection” in the invention. Therefore, the state of FIG. 9A is aconcrete example of a “first state” in the invention, and the state ofFIG. 9B is a concrete example of a “second state”.

In this case, in the TMR devices 1 a and 1 b, when the magnetizationdirection of the first magnetic layers 2 a and 2 b and that of thesecond magnetic layers 8 a and 8 b are parallel to each other, a lowresistance state in which large tunnel current flows is obtained. Whenthey are antiparallel to each other, a high resistance state in whichonly small tunnel current flows is obtained. That is, one of the pair ofTMR devices 1 a and 1 b is always in the low resistance state and theother one is in the high resistance state, thereby storing information.In the case where the write currents flow in the opposite directions inthe write bit line 5 and the write word line 6 or in the case where thewrite current flows only in the write bit line 5 or the write word line6, the magnetization direction of each of the second magnetic layers 8is not inverted and the data is not rewritten.

As described above, in the memory cell 1 in the magnetic memory deviceof the embodiment, by passing the currents in the same direction to bothof the write bit line 5 and the write word line 6, the direction of thecurrent magnetic field generated by the write bit line 5 and that of thecurrent magnetic field generated by the write word line 6 become thesame in the toroidal magnetic layer 4, so that a synthetic magneticfield can be generated. Consequently, as compared with the case wherethe toroidal magnetic layer 4 is not provided and the case where thewrite bit line 5 and the write word line 6 perpendicularly cross eachother, higher magnetic flux density is obtained. Thus, the currentmagnetic field can be used more efficiently and the current necessary toinvert the magnetization in the connection parts 14 a and 14 b of thetoroidal magnetic layer 4 and the second magnetic layers 8 a and 8 b canbe further reduced. Moreover, in the memory cell 1, a pair of stackedbodies S20 a and S20 b are disposed so that their stack layer surfacesface each other, so that the magnetization direction in the connectionpart 14 a and the second magnetic layer 8 a and the magnetizationdirection in the connection part 14 b and the second magnetic layer 8 bare necessarily antiparallel to each other. Therefore, by using thephenomenon, binary information of “0” or “1” can be stored. Since thetoroidal magnetic layer 4 is provided commonly for the pair of stackedbodies S20 a and S20 b, the pair of TMR devices 1 a and 1 b can beeasily formed, the formation area of the memory cell 1 can be reduced,and a larger amount of stored information can be increased.

Since the second magnetic layer 8 is provided between the tunnel barrierlayer 3 and the connection part 14 of the toroidal magnetic layer 4, thefollowing advantages are obtained. The connection part 14 and the secondmagnetic layer 8 can be exchange-coupled and the magnetization directionof the second magnetic layer 8 as a second magnetic sensitive part isaligned more preferably, so that more stable writing can be performed.Further, the coercive force of the connection part 14 can be reduced.Consequently, by reducing the current value at the time of writingoperation, the heat generation amount can be reduced, and the functionsof the magnetic memory device can be fully displayed.

Referring now to FIGS. 1, 8, 10A, and 10B, the reading operation in themagnetic memory device will be described.

First, one of the plurality of bit decode lines 71 is selected by theaddress decoder circuit 56A in the first drive control circuit portion56 and a control signal is transmitted to the corresponding senseamplification circuit 56B. As a result, read current flows in the readbit lines 33 a and 33 b and the positive potential is given to the sideof the stacked bodies S20 a and S20 b in the TMR devices 1 a and 1 b.Similarly, by the X-direction address decoder circuit 58A in the seconddrive control circuit portion 58, one of the plurality of word decodelines 72 is selected and the read switch 83 in the corresponding part isdriven. The selected read switch 83 is energized, read current flows inthe corresponding read word line 32, and a negative potential is givento the side opposite to that of the stacked bodies S20 a and S20 b inthe TMR devices 1 a and 1 b. Therefore, read current necessary forreading can be passed to one memory cell 1 selected by the Y-directionaddress decoder circuit 56A and the X-direction address decoder circuit58A. Based on the read current, the magnetization directions of the pairof second magnetic layers 8 a and 8 b are detected, thereby enablingstored information to be read. It is important that the read currentfrom the read bit lines 33 a and 33 b passes through the pair of diodes75 a and 75 b and flow in the memory cell 1. The reason will bedescribed later.

FIGS. 10A and 10B are circuit diagrams each showing a portion around thememory cell 1. The magnetization directions of the first magnetic layers2 a and 2 b in the stacked bodies S20 a and S20 b are indicated byhollow arrows, and those of the second magnetic layers 8 a and 8 b areindicated by solid arrows. Both of the magnetization directions of thefirst magnetic layers 2 a and 2 b are fixed to the left directions. FIG.10A shows a state corresponding to FIG. 9A. In FIG. 10A, themagnetization direction of the first magnetic layer 2 a and that in thesecond magnetic layer 8 a in the stacked body S20 a are the same, andthe magnetization direction of the first magnetic layer 2 b and that ofthe second magnetic layer 8 b in the other stacked body S20 b areantiparallel to each other. In this case, the stacked body S20 a is inthe low resistance state, and the stacked body S20 b is in the highresistance state. This case corresponds to, for example, “0”. In theother case of FIG. 10B showing a state corresponding to FIG. 9B,different from the case of FIG. 10A, the stacked body S20 a is in thehigh resistance state and the stacked body S20 b is in the lowresistance state. This case corresponds to, for example, “1”. Suchbinary information can be read by utilizing the fact that the resistancevalues of the stacked bodies S20 a and S20 b are different from eachother and detecting the difference between the values of currentsflowing in the stacked bodies S20 a and S20 b.

The action in the reading operation of the magnetic memory device of theembodiment will be described in comparison with a comparative example.FIG. 46 is a configuration diagram of a circuit system including amemory cell group including a memory cell 501 as a comparative exampleof the embodiment and a readout circuit. FIG. 47 shows a sectionalconfiguration of the memory cell 501.

In the comparative example shown in FIGS. 46 and 47, one diode 175 isprovided on the side opposite to the sense amplifier circuit 56B for thepair of stacked bodies S20 a and S20 b. As shown in FIG. 47, the memorycell 501 is formed on the diode 175 buried in a substrate 131 and itstop face is connected to the pair of read bit lines 33 a and 33 b. Moreconcretely, the memory cell 501 has the toroidal magnetic layer 4electrically connected to a conductive layer 136 of the diode 175 via aconnection layer 136T and the pair of connection parts 20 a and 20 bfacing each other on the surface of the toroidal magnetic layer 4. Thepair of stacked bodies S20 a and S20 b is formed by the pair ofconnection parts 20 a and 20 b in cooperation with part of the toroidalmagnetic layer 4, and the stacked bodies S20 a and S20 b in a pair areconnected to the read bit lines 33 a and 33 b in a pair, respectively.

In the case of selecting a read switch 83 m and reading informationstored in a memory cell 501 m, in the comparative example of FIGS. 46and 47, a round of read current which flows in a path L passing thememory cell 501 m+1 occurs. A path R indicated by solid line is aregular current path. Concretely, for example, the read current flowedfrom the sense amplifier circuit 56B to the read bit line 33 a flows inthe stacked body S20 a of the memory cell 501 m+1 which is notinherently selected as a cell to be read, and further passes through thestacked body S20 b via the toroidal magnetic layer 4 shared. After that,the read current flows backward through the read bit line 33 b towardthe sense amplifier circuit 56B and joins to the read current flowingtoward the stacked body S20 b of the memory cell 501 m.

In contrast, in the magnetic memory device of the embodiment, thestacked body S20 b, the toroidal magnetic layer 4, and the stacked bodyS20 a are sequentially stacked on the substrate 31 in which the pair ofdiodes 75 a and 75 b are provided, and the pair of diodes 75 a and 75 band the toroidal magnetic layer 4 are electrically connected to eachother via the pair of stacked bodies S20 a and S20 b. As a result, thecircuit configuration is obtained in which the pair of diodes 75 a and75 b is disposed between the pair of read bit lines 33 a and 33 b andthe pair of stacked bodies S20 a and S20 b, respectively, on each ofcurrent paths of the read current supplied to the pair of stacked bodiesS20 a and S20 b. Therefore, noise on a read signal can be reduced, andmagnetic information can be stably read.

Further, in the magnetic memory device of the embodiment, read currentis supplied from each of the read bit lines 33 a and 33 b in the pair toeach of the first and second stacked bodies S20 a and S20 b. On thebasis of the difference between the pair of read current values,information can be read from the magnetic memory cell. Consequently, theread currents are differentially output so that noise occurring in eachof the read bit lines 33 and an offset component included in each ofoutput values of the TMR devices 1 a and 1 b are cancelled out eachother and removed.

A method of manufacturing the magnetic memory device of the embodimenthaving the configuration as described above will now be described.

The method of manufacturing the magnetic memory device of the embodimentincludes the steps of forming the stacked layer part 20 b as part of thestacked body S20 b over the substrate 31 provided with the pair ofdiodes 75 a and 75 b; forming a bottom magnetic layer 4B so as to coverat least the stacked layer part 20 b; forming the write word line 6 overthe bottom magnetic layer 4B via an insulating film 7A; forming thewrite bit line 5 over the write word line 6 via an insulating film 7C soas to include a part in which the write word line 6 and the write bitline 5 extend in parallel with each other; forming a stack layer patternforming a stack layer pattern 19 including a part in which the writeword line 6 and the write bit line 5 extend in parallel with each otherby sequentially etching and patterning the write bit line 5, theinsulating film 7C, and the write word line 6; forming the toroidalmagnetic layer 4 by providing a top magnetic layer so as to surround ofthe stack layer pattern 19 via insulating films 7D and 7E; forming thestacked body S20 a by providing the stack layer part 20 a in a positioncorresponding to the stacked body S20 b over the toroidal magnetic layer4 and forming the memory cell 1 having the stacked bodies S20 a and S20b; and electrically connecting the stacked body S20 a and the diode 75a. The method will be described concretely hereinbelow.

A method of manufacturing, mainly, the memory cell 1 in the magneticmemory device will be described in detail by referring to FIGS. 11 to30. FIGS. 11 to 30 are cross sections corresponding to FIG. 7 and showmanufacturing processes.

First, as shown in FIG. 11, the substrate 31 in which the pair of diodes75 a and 75 b is buried is prepared, and the stack layer part 20 b isformed on the conductive layer 36 b in the diode 75 b. Concretely,first, a resist pattern is selectively formed so as to cover the areaother than the area for forming the stack layer part 20 b by an i-linestepper or the like. Next, the first magnetic layer 2 b taking the formof, for example, a CoFe layer, and an aluminum (Al) layer aresequentially formed on the whole surface by sputtering or the like. Byperforming an oxidizing process on the aluminum layer, the tunnelbarrier layer 3 b is obtained. Further, on the tunnel barrier layer 3 b,the second magnetic layer 8 b taking the form of, for example, a CoFelayer is formed by sputtering or the like. To prevent deteriorationduring process on the stack layer part 20 b, a cap layer (protectivelayer) made of tantalum (Ta) or the like may be provided. Subsequently,by lifting off the resist pattern, the stack layer part 20 b having apredetermined pattern shape and constructed by the first magnetic layer2, the tunnel barrier layer 3, and the second magnetic layer 8 isexposed.

Next, for example, by using TEOS (tetraethylorthosilicate; Si(OC₂H₅)₄),an insulating film 17A made of silicon oxide (SiO₂) is formed so as tocover the whole by a CVD (Chemical Vapor Deposition) system. After that,for example, annealing is performed at a temperature of 250° C. or lessin magnetic fields of (1/π)×10⁶ A/m, thereby pinning the magnetizationdirection of the first magnetic layer 2 b. After annealing, for example,by a CMP (Chemical Mechanical Polishing) system, the surface of theinsulating film 17A is planarized and the top face of the stack layerpart 20 b is exposed. Further, by reverse sputtering or the like,impurities in the top face of the stack layer part 20 b are removed.After that, the bottom magnetic layer 4B is selectively formed so as tocover the top face of the stack layer part 20 b. By the operation,formation of the stacked body S20 b constructed by part of the bottommagnetic layer 4B and the stack layer part 20 b completes. In this case,a resist frame (not shown) is formed selectively by usingphotolithography. After that, for example, an NiFe layer is formed in anon-protection area by sputtering or the like, and the resist frame isremoved.

After formation of the bottom magnetic layer 4B, as shown in FIG. 12,the insulating film 7A made of, for example, SiO₂ is formed so as tocover the whole by a CVD system. The insulating film 7A is a concreteexample corresponding to a “first insulating film” of the invention.

Subsequently, a metal layer (not shown) made of, for example, titanium(Ti) is formed on the insulating film 7A by sputtering or the like.After that, as shown in FIG. 13, on the metal layer, the write word line6 is selectively formed so as to cover at least the area for forming thestacked body S20 b. Concretely, a resist pattern (not shown) having apredetermined shape is formed on the metal layer on the insulating film7A. After that, the resultant is soaked in a plating bath and a platingprocess using the metal layer as an electrode is performed, therebyforming the write word line 6 made of, for example, copper (Cu). Afterremoving the resist pattern, the unnecessary metal layer is removed byion milling.

Next, as shown in FIG. 14, an insulating film 7B made of, for example,SiO₂ is formed so as to cover the whole by using the CVD system. Afterthat, the insulating film 7B is polished until the write word line 6 isexposed finally by the CMP system, thereby planarizing the surface ofthe write word line 6 and the insulating film 7B. The insulating film 7Bis a concrete example corresponding to a “second insulating film” of theinvention.

Subsequently, the insulating film 7C made of, for example, SiO₂ isformed on the whole. On the insulating film 7C, a metal layer made of,titanium is formed by sputtering or the like. After that, as shown inFIG. 15, the write bit line 5 is selectively formed so as to cover thearea corresponding to the write word line 6 of the metal layer.Concretely, a resist pattern (not shown) having a predetermined shape isformed on the insulating film 7C. After that, the resultant is soaked ina plating bath and a plating process using the metal layer as anelectrode is performed, thereby forming the write bit line 5 made of,for example, copper. After removing the resist pattern, the unnecessarymetal layer is removed by ion milling.

Next, as shown in FIG. 16, by using the write bit line 5 as a mask, thestack layer pattern 19 is formed in a self aligned manner. Concretely,by removing the insulating film 7C, the write word line 6, and theinsulating film 7A which are not protected with the write bit line 5 byRIE (Reactive Ion Etching) using C₄F₈ as a reactive gas and ion milling,the stack layer pattern 19 is formed. It is important to remove theinsulating film 7A until the bottom magnetic layer 4B is exposed.

As described above, by forming the stack layer pattern 19 in a selfaligned manner with the write bit line 5 as a mask, the write word line6 having the same width as that of the write bit line 5 can be formedwith high precision. Further, the resist pattern forming process, theprocess of removing the resist pattern, and the like can be omitted, sothat the manufacturing process can be simplified.

After formation of the stack layer pattern 19 in the parallel part 10 inthe write bit line 5 and the write word line 6, as shown in FIG. 17, theinsulating film 7D made of SiO₂ or the like is formed so as to cover thewhole by using the CVD system or the like.

Subsequently, as shown in FIG. 18, the insulating film 7D except for theportion formed so as to be in contact with the side face portion of thestack layer pattern 19 is removed completely by ion milling or the like,and a metal layer made of, for example, NiFe is thinly formed on theentire surface by sputtering or the like. After that, as shown in FIG.19, a photoresist layer 30A is formed on the metal layer correspondingto the area in which the bottom magnetic layer 4B is not formed byphotolithography or the like.

After formation of the photoresist layer 30A, the resultant is soaked ina plating bath and a plating process using the metal layer as anelectrode is performed, thereby forming an intermediate magnetic layer4S made of, for example, NiFe. Subsequently, the photoresist layer 30Ais removed, and the unnecessary metal layer is removed by ion milling.Further, as shown in FIG. 21, an insulating film 17B made of, forexample, SiO₂ is formed so as to cover the whole by the CVD system orthe like and is polished until the write bit line 5 is finally exposedby using the CMP system, thereby forming a flat surface including thewrite bit line 5.

After that, as shown in FIG. 22, the insulating film 7E is selectivelyformed so as to cover the flat exposed surface of the write bit line 5by photolithography or the like. Further, a metal layer is thinly formedby, for example, sputtering. After that, as shown in FIG. 23, aphotoresist layer 30B is formed on the metal layer in the areacorresponding to the insulating film 17B by photolithography or thelike. Further, the resultant is soaked in a plating bath and a platingprocess using the metal layer as an electrode is performed, therebyforming a top magnetic layer 4U made of, for example, NiFe. By theoperation, formation of the toroidal magnetic layer 4 made by the bottommagnetic layer 4B, the intermediate magnetic layer 4S, and the topmagnetic layer 4U completes. The intermediate magnetic layer 4S and thetop magnetic layer 4U are concrete examples corresponding to a “topmagnetic layer” of the invention.

Subsequently, as shown in FIG. 24, by removing the photoresist layer30B, the top magnetic layer 4U as part of the toroidal magnetic layer 4is exposed. The stack layer part 20 a is provided in a positioncorresponding to the stacked body S20 b on the top magnetic layer 4U,thereby forming the stacked body S20 a. Concretely, first, a resistpattern is selectively formed so as to cover the area other than thearea for forming the stack layer part 20 b by an i-line stepper or thelike. Next, the second magnetic layer 8 a taking the form of, forexample, a CoFe layer, and an aluminum (Al) layer are sequentiallyformed on the whole surface by sputtering or the like. By performing anoxidizing process on the aluminum layer, the tunnel barrier layer 3 a isobtained. Further, on the tunnel barrier layer 3 a, the first magneticlayer 2 a taking the form of, for example, a CoFe layer is formed bysputtering or the like. Subsequently, by lifting off the resist pattern,the stack layer part 20 a having a predetermined pattern shape andconstructed by the first magnetic layer 2 a, the tunnel barrier layer 3a, and the second magnetic layer 8 a is exposed. By the operation,formation of the stacked body S20 a constructed by part of the topmagnetic layer 4U and the stack layer part 20 a completes.

Subsequently, after the photoresist layer 30C is selectively formed onthe stack layer part 20 a, as shown in FIG. 25, for example, by usingTEOS, an insulating film 17C made of silicon oxide (SiO₂) is formed soas to cover the whole by a CVD (Chemical Vapor Deposition) system.Further, the photoresist layer 30C is lifted off.

After that, to form a connection layer 36T for electrically connectingthe conductive layer 36 a and the stacked body S20 a, as shown in FIG.26, a via hole 30H1 is formed in part of the area corresponding to theconductive layer 36 a. Concretely, a resist pattern is selectivelyformed so as to cover the area other than the area for forming the viahole 30H1 by an i-line stepper or the like. By RIE using a reactive gassuch as C₄F₈, etching is performed in the layer stack direction to theconductive layer 36 a.

The resist pattern used at the time of forming the via hole 30H1 isremoved and, after that, as shown in FIG. 27, the connection layer 36Tmade of copper (Cu) is formed so as to connect the conductive layer 36 aand the stacked body S20 a. For example, a photoresist layer 30D havinga predetermined shape is selectively formed on the insulating film 17Cand, after that, the connection layer 36T is formed by the CVD system byusing Cu(1) hexafluoroacetylacetonato trimethylvinylsilane.

After formation of the connection layer 36T, as shown in FIG. 28, aninsulating film 17D made of, for example, SiO₂ is formed on the wholesurface by the CVD system by using, for example, TEOS. After that, asshown in FIG. 29, to form a connection layer 32T electrically connectingthe top magnetic layer 4U (toroidal magnetic layer 4) and the read wordline 32, a via hole 30H2 is formed in part of the area corresponding tothe top magnetic layer 4U. Concretely, a photoresist layer 30E isselectively formed so as to cover the area other than the area forforming the via hole 30H2 by an i-line stepper or the like. By RIE usinga reactive gas such as C₄F₈, etching is performed in the layer stackdirection to the top magnetic layer 4U.

The resist pattern used at the time of forming the via hole 30H2 isremoved and, after that, as shown in FIG. 30, the connection layer 32Tmade of copper for connecting the top conductive layer 4U and the readword line 32, and the read word line 32 are formed. For example, theconnection layer 32T and the read word line 32 are formed by the CVDsystem by using Cu(1) hexafluoroacetylacetonato trimethylvinylsilane.Further, an insulating film 17E made of, for example, SiO₂ is formed onthe whole surface so as to cover the read word line 32.

After that, the write word line lead electrodes 41 are formed at bothends of the write word line 6, the write bit line lead electrodes 42 areformed at both ends of the write bit line 5, the read word line leadelectrodes 43 are formed at both ends of the read word line 32, and theread bit line lead electrodes 44 a and 44 b are formed at both ends ofthe read bit lines 33 a and 33 b.

By the above, formation of the memory cell group 54 including the memorycells 1 completes.

After that, by further performing a step of forming a protective layermade of SiO₂, aluminum oxide (Al₂O₃), or the like by a sputter system, aCVD system, or the like and a step of polishing the protective layer toexpose the lead electrodes 41 to 44, manufacture of the magnetic memorydevice completes.

According to the manufacturing method of the embodiment, the stack layerpart 20 b as part of the stacked body S20 b is formed on the diode 75 bburied in the substrate 31, and the toroidal magnetic layer 4 is formedso as to cover the stack layer part 20 b. After that, the stacked bodyS20 a is formed by providing the stack layer part 20 a in the positioncorresponding to the stacked body S20 b on the toroidal magnetic layer 4and, further, the stacked body S20 a and the diode 75 a are electricallyconnected to each other. As a result, the magnetic memory devicecorresponding to the circuit configuration shown in FIG. 8 can beobtained. That is, the diodes 75 a and 75 b can be formed between thepair of read bit lines 33 a and 33 b and the pair of stack layer partsS20 a and S20 b. Consequently, read currents from the sense amplifiercircuit 56B pass through the stacked bodies S20 a and S20 b via thediodes 75 a and 75 b, are combined in the integrated toroidal magneticlayer 4, and can be passed to the read word line 32. A magnetic memorydevice in which an unnecessary round other than a normal current pathcan be avoided is obtained.

As a method for obtaining correspondence to the circuit configurationshown in FIG. 8, a method of forming a magnetic memory device by forminga diode (rectifying device) on the memory cell 1 can be considered. Inthis case, however, the stacked body of the TMR device is destroyed byheat generated at the time of forming a diode (rectifying device), andits function is lost. It is therefore difficult to actually form themagnetic memory device.

In addition, according to the manufacturing method of the embodiment,the stack layer pattern 19 is formed in a self aligned manner by usingthe write bit line 5 as a mask. Consequently, high-precision processingcan be performed, the process of forming the resist pattern, the processof removing the resist pattern, and the like can be omitted, and themanufacturing process can be simplified as a whole.

Second Embodiment

Referring to FIGS. 31 to 35A and 35B, a magnetic memory device of asecond embodiment of the invention will now be described.

FIG. 31 shows a sectional configuration of the memory cell 1H in themagnetic memory device of the embodiment and corresponds to FIG. 5 ofthe first embodiment. FIG. 32 is an enlarged perspective view of thememory cell 1H and corresponds to FIG. 4. FIG. 33 shows a planarconfiguration of a magnetic memory device of the modification andcorresponds to FIG. 3. In FIGS. 31 to 33, the same reference numeralsare designated to the same parts substantially the same as componentsshown in FIGS. 3 to 5.

In the following description, the configuration of the magnetic memorydevice of the second embodiment will be described mainly with respect tothe points different from those of the first embodiment, and the otherdescription will be properly omitted.

In the memory cell 1P of the first embodiment, the write word line 6 andthe write bit line 5 are arranged so as to be adjacent to each other ina straight line passing through the stacked bodies S20 a and S20 b inthe area penetrating the toroidal magnetic layer 4. In contrast, in thememory cell 1H of the modification, as shown in FIGS. 31, 32, and 34,the write word line 6 and the write bit line 5 are arranged so as to beadjacent to each other in a direction orthogonal to the straight linepassing through the stacked bodies S20 a and S20 b in the areapenetrating the toroidal magnetic layer 4. The write bit line 5 and thewrite word line 6 have to be electrically insulated from each other.Therefore, as shown in FIG. 32, the write word line 6 is bent not onlyin the XY plane but also in the Z direction. Concretely, the write wordline 6 is constructed by a bottom write word line 6B penetrating thetoroidal magnetic layer 4 in the Y direction together with the write bitline 5, a top write word line 6U extending in the X direction in an XYplane different from the XY plane including the write bit line 5 and thebottom write word line 6B, and a connection part 6T connecting the topand bottom write word lines 6U and 6B. In this case, not only the writeword line 6 which is bent as described above but also the write bit line5 may be bent.

The memory cell 1H has a compact configuration similar to the memorycell 1P except for the point that the positions of disposing the stackedbodies S20 a and S20 b with respect to the direction of arranging thewrite word line 6 and the write bit line 5 penetrating the toroidalmagnetic layer 4 are different from each other. Therefore, in the memorycell 1H, writing and reading operations similar to those in the memorycell 1P can be performed.

Referring now to FIG. 2 and FIGS. 35A and 35B, the writing operation inthe memory cell 1H in the second embodiment will be described. FIGS. 35Aand 35B show the relation between the write current direction and thecirculating magnetic field direction (magnetization direction) in thesectional configuration of the memory cell 1H illustrated in FIG. 31,and correspond to FIGS. 9A and 9B in the first embodiment, respectively.

FIG. 35A shows a case where write currents flow in the same direction tothe write bit line 5 and the write word line 6 which pass through thememory cell 1H and are parallel with each other, corresponding to thewrite current direction illustrated in FIG. 2. FIG. 35A shows a casewhere the write current flows from the back to this side in thedirection perpendicular to the drawing sheet in the memory cell 1H (inthe −Y direction), and the circulating magnetic field 34 is generated inthe counterclockwise direction in the toroidal magnetic layer 4 of theportion surrounding the write bit line 5. In this case, themagnetization direction of the connection part 14 a and the secondmagnetic layer 8 a becomes the −X direction, and the magnetizationdirection of the connection part 14 b and the second magnetic layer 8 bbecomes the +X direction. On the other hand, FIG. 35B shows a case wherethe write current flows from this side to the back in the directionperpendicular to the drawing sheet in the memory cell 1H (in the +Ydirection), and the circulating magnetic field 34 is generated in theclockwise direction in the toroidal magnetic layer 4. In this case, themagnetization direction of the connection part 14 a and the secondmagnetic layer 8 a becomes the +X direction, and the magnetizationdirection of the connection part 14 b and the second magnetic layer 8 bbecomes the −X direction.

As obvious from FIGS. 35A and 35B, the magnetization directions of thesecond magnetic layers 8 a and 8 b in the pair of TMR devices 1 a and 1b change so as to be opposite to each other in accordance with thedirection of the circulating magnetic field 34 generated by currentsflowing in both of the write bit line 5 and the write word line 6penetrating toroidal magnetic layer 4. By using the changes, binaryinformation of “0” or “1” can be stored in the memory cell 1H.

As described above, also in the second embodiment, effects similar tothose of the foregoing first embodiment can be obtained.

Third Embodiment

Referring to FIG. 36A, a magnetic memory device of a third embodiment ofthe invention will now be described.

FIG. 36A shows a sectional configuration of a memory cell 121P in themagnetic memory device of the embodiment and corresponds to FIG. 5 ofthe first embodiment. In FIG. 36A, the same reference numerals aredesignated to the same parts substantially the same as components shownin FIG. 5.

In the following description, the confignration of the magnetic memorydevice of the third embodiment and a method of manufacturing themagnetic memory device will be described mainly with respect to thepoints different from the first embodiment, and the other descriptionwill be properly omitted.

In the memory cell 1 in the magnetic memory device of the firstembodiment, the magneto-sensitive layer is constructed by the connectionparts 14 a and 14 b and the second magnetic layers 8 a and 8 b which aremagnetically exchange-coupled to each other. The connection parts 14 aand 14 b construct a part of the toroidal magnetic layer 4. In contrast,in the memory cell 121P in the magnetic memory device of the thirdembodiment, as shown in FIG. 36A, the magneto-sensitive layer constructsa part of the toroidal magnetic layer 4.

Concretely, connection parts 84 a and 84 b are magneto-sensitive partsin the toroidal magnetic layer 4 and function also as magneto-sensitiveparts in the stacked bodies S21 a and S21 b, so that the second magneticlayers 8 a and 8 b can be omitted, and the memory cell 121P having aconfiguration simpler than that of the memory cell 1 can be obtained.The connection parts 84 a and 84 b are a concrete example of a“magneto-sensitive layer” in the invention.

In this case, it is desirable that the axis of easy magnetizations ofthe first magnetic layers 2 a and 2 b and the connection parts 84 a and84 b be parallel to each other so that the magnetization directions ofthe first magnetic layers 2 a and 2 b and the connection parts 84 a and84 b are stabilized in a state where they are parallel or antiparallelto each other. The toroidal magnetic layer 4 is made of, for example,nickel iron alloy (NiFe), and the thickness in the section direction inthe connection parts 84 a and 84 b is, for example, 20 nm. Desirably,the coercive force of the connection parts 84 a and 84 b lies in therange from (50/4π)×10³ A/m to (100/4π)×10³ A/m, and is lower than thatof the first magnetic layer 2. With the coercive force of less than(50/4π)×10³ A/m, the magnetization direction in the connection parts 84a and 84 b may be disturbed by an unnecessary magnetic field such as anexternal disturbance magnetic field. On the other hand, with a coerciveforce exceeding (100/4π)×10³ A/m, there is the possibility that the TMRdevices 121 a and 121 b itself deteriorates due to heat generationcaused by increase in write current. Further, when the coercive force ofthe connection parts 84 a and 84 b becomes equal to or higher than thatof the first magnetic layers 2 a and 2 b, write current increases, themagnetization direction of the first magnetic layers 2 a and 2 b asmagnetization pinned layers is changed, and it causes deterioration inthe function of the TMR devices 121 a and 121 b as memory elements.

In the memory cell 121P, the connection parts 84 a and 84 b function asstorage layers for storing information. That is, the magnetizationdirection of the connection parts 84 a and 84 b is inverted by thecirculating magnetic field which is generated by write currents flowingin the write bit line 5 and the write word line 6, and information isstored. In the following, the writing operation in the memory cell 121will be described concretely.

FIG. 36A shows a case where write currents flow in the same direction inthe write bit line 5 and the write word line 6 passing through the TMRdevices 121 a and 121 b and parallel to each other. FIG. 36A shows acase where write current flows from this side to the depth in thedirection perpendicular to the drawing sheet (to the +Y direction) inthe TMR devices 121 a and 121 b, and the circulating magnetic field 34is generated in the counterclockwise direction in the toroidal magneticlayer 4. In this case, the magnetization direction of the connectionpart 84 a is the −X direction, and the magnetization direction of theconnection part 84 b is the +X direction. Although not shown, incontrast, in the case where write current flows from the depth to thisside in the direction perpendicular to the drawing sheet (to the −Ydirection) and the circulating magnetic field 34 is generated in theclockwise direction in the toroidal magnetic layer 4, the magnetizationdirection of the connection part 84 a becomes the +X direction, and themagnetization direction of the connection part 84 b becomes the −Xdirection.

When currents flow in the same direction in the write bit line 5 and thewrite word-line 6, the magnetization directions of the connection parts84 a and 84 b become antiparallel to each other and 0 or 1 can berecorded.

As described above, in the magnetic memory device of the thirdembodiment, the connection parts 84 a and 84 b function as themagneto-sensitive parts in the toroidal magnetic layer 4 and also themagneto-sensitive parts in the stacked bodies S21 a and S21 b.Therefore, the second magnetic layer 8 can be omitted, and the memorycell 121 having a simpler configuration can be constructed.

Fourth Embodiment

Referring to FIG. 36B, a magnetic memory device of a fourth embodimentof the invention will now be described.

FIG. 36B shows a sectional configuration of the memory cell 121H in themagnetic memory device of the embodiment. In FIG. 36B, the samereference numerals are designated to the same parts substantially thesame as components shown in FIG. 36A described as the third embodiment.

In the following description, the configuration of the magnetic memorydevice of the fourth embodiment will be described with respect to thepoints different from the third embodiment, and the other descriptionwill be properly omitted.

In the memory cell 121P of the third embodiment, the write word line 6and the write bit line 5 are arranged so as to be adjacent to each otherin a straight light passing through the stacked bodies S21 a and S21 bin the area penetrating the toroidal magnetic layer 4. In contrast, inthe memory cell 121H of the fourth embodiment, as shown in FIG. 36B, thewrite word line 6 and the write bit line 5 are arranged so as to beadjacent to each other in a direction orthogonal to the straight linepassing through the stacked bodies S21 a and S20 b in the areapenetrating the toroidal magnetic layer 4.

As obvious from FIG. 36B, the magnetization directions of the secondmagnetic layers 8 a and 8 b in the pair of TMR devices 121 a and 121 bchange so as to be opposite to each other in accordance with thedirection of the circulating magnetic field 34 generated by currentsflowing in both of the write bit line 5 and the write word line 6penetrating toroidal magnetic layer 4. By using the changes, binaryinformation of “0” or “1” can be stored in the memory cell 121H.

As described above, also in the fourth embodiment, effects similar tothose of the third embodiment can be obtained.

Modifications of First to Fourth Embodiments

Referring to FIGS. 37A to 40, magnetic memory cells in magnetic memorydevices of modifications of the first to fourth embodiments will now bedescribed.

Modification 1

FIG. 37A shows a sectional configuration of a memory cell 122P as amodification (modification 1) of the first embodiment and corresponds toFIG. 9A. In FIG. 37A, the same reference numerals are designated to thesame parts substantially the same as components shown in FIG. 9A.

In the memory cell 1 (1P) in the magnetic memory device of the firstembodiment, the magneto-sensitive layer is constructed by the connectionparts 14 a and 14 b as part of the toroidal magnetic layer 4 and thesecond magnetic layers 8 a and 8 b, and the connection parts 14 a and 14b and the second magnetic layers 8 a and 8 b are magneticallyexchange-coupled to each other. In contrast, in the memory cell 122P ofthe modification, as shown in FIG. 37A, in addition to the configurationof the memory cell 1 (1P), the magneto-sensitive layer further includesa nonmagnetic conductive layer 9 for anti-ferromagnetic-coupling theconnection parts 14 a and 14 b and the second magnetic layers 8 a and 8b. Concretely, the memory cell 122P is constructed by a pair of TMRdevices 122 a and 122 b. The TMR device 122 a has a stacked body S22 a,and the TMR device 122 b has a stacked body S22 b. The stacked bodiesS22 a and S22 b in a pair are constructed by stack layer parts 22 a and22 b and the connection parts 14 a and 14 b, respectively. The stacklayer parts 22 a and 22 b have, in order from the side of the toroidalmagnetic layer 4, nonmagnetic conductive layers 9 a and 9 b, the secondmagnetic layers 8 a and 8 b, the tunnel barrier layers 3 a and 3 b, andthe first magnetic layers 2 a and 2 b, respectively. The nonmagneticconductive layers 9 a and 9 b are made of, for example, ruthenium (Ru)or copper (Cu). The nonmagnetic conductive layers 9 a and 9 b are aconcrete example of a “first nonmagnetic conductive layer” of theinvention.

In the memory cell 122P of the modification, the connection parts 14 aand 14 b and the second magnetic layers 8 a and 8 b areantiferromagnetically coupled to each other. Consequently, even when thecoercive force is less than (50/4π)×10³ A/m, a problem such that themagnetization directions in the connection parts 14 a and 14 b aredisturbed by an unnecessary magnetic field such as an externaldisturbance magnetic field does not occur. For example, the toroidalmagnetic layer 4 can be made of iron (Fe), NiFe, CoFe, NiFeCo, cobalt(Co), or the like.

The second magnetic layers 8 a and 8 b become part for holding recordedinformation and are stabilized by an anisotropic magnetic fieldgenerated by antiferromagnetic coupling. The coercive force of thesecond magnetic layers 8 a and 8 b is (100/4π)×10³ A/m or less and isdesirably lower than that of the first magnetic layers 2 a and 2 b.

The writing operation in the memory cell 122P will now be described.

FIG. 37A shows a case where write currents flow in the same direction inthe write bit line 5 and the write word line 6 passing through thememory cell 122P. That is, FIG. 37A shows a case where write currentflows from this side to the depth in the direction perpendicular to thedrawing sheet (to the +Y direction) in the TMR device 122 a, and thecirculating magnetic field 34 is generated in the counterclockwisedirection in the toroidal magnetic layer 4. In this case, themagnetization direction of the second magnetic layer 8 a becomes the +Xdirection, and the magnetization direction of the second magnetic layer8 b becomes the −X direction. In contrast, in the case where writecurrent flows from the depth to this side in the direction perpendicularto the drawing sheet (to the −Y direction) in the TMR device 122 a andthe circulating magnetic field 34 is generated in the clockwisedirection, the magnetization direction of the second magnetic layer 8 abecomes the −X direction, and the magnetization direction of the secondmagnetic layer 8 b becomes the +X direction. When currents flow in thesame direction in the write bit line 5 and the write word line 6, themagnetization directions of the second magnetic layer 8 becomeantiparallel to each other and 0 or 1 can be recorded.

As described above, the memory cell 122P as the modification 1 has, inaddition to the configuration of the first embodiment, the nonmagneticconductive layers 9 a and 9 b between the connection parts 14 a and 14 bin the toroidal magnetic layer 4 and the second magnetic layers 8 a and8 b. With the configuration, the connection parts 14 a and 14 b and thesecond magnetic layers 8 a and 8 b are stronglyantiferromagnetic-coupled to each other. Thus, the magnetizationdirections of the connection parts 14 a and 14 b and the second magneticlayers 8 a and 8 b as the magneto-sensitive layers are stabilizedwithout being disturbed by an unnecessary magnetic field such as anexternal disturbance magnetic field or the like. In addition, thecoercive force of the connection parts 14 a and 14 b can be furthersuppressed by the above configuration. Therefore, by reducing thecurrent value in the writing operation, the heat generation amount canbe reduced and diffusion and movement of metal elements and the likecontained in the connection parts 14 a and 14 b to the second magneticlayers 8 a and 8 b can be blocked by providing the nonmagneticconductive layers 9 a and 9 b, so that thermal stability improves. As aresult, writing can be performed more stably.

Modification 2

FIG. 37B shows a sectional configuration of a memory cell 122H as amodification (modification 2) of the memory cell 1 (1H) in the magneticmemory device of the second embodiment. In the memory cell 122H, asshown in FIG. 37B, the magneto-sensitive layer further has thenonmagnetic conductive layers 9 for anti-ferromagnetic coupling theconnection parts 14 a and 14 b and the second magnetic layers 8 a and 8b between the connection parts 14 a and 14 b and the second magneticlayers 8 a and 8 b.

In the memory cell 122H, in a manner similar to the modification 1, theconnection parts 14 a and 14 b and the second magnetic layers 8 a and 8b are strongly antiferromagnetically coupled to each other. As a result,writing can be performed more stably.

Modifications 3 and 4

FIG. 38A shows a sectional configuration of a memory cell 123P as amodification (modification 3) of the third embodiment and corresponds toFIG. 36A. FIG. 38B shows a sectional configuration of a memory cell 123Has a modification (modification 4) of the fourth embodiment andcorresponds to FIG. 36B.

The stacked bodies S21 a and S21 b included in the memory cells 121P and121H in the third and fourth embodiments have a structure called acoercive force difference type including the first magnetic layers 2 aand 2 b having a coercive force larger than that of the connection parts84 a and 84 b. On the other hand, stacked bodies S23 a and S23 b in thememory cells 123P and 123H shown in FIGS. 38A and 38B have a structurecalled an exchange bias type in which the magnetization directions ofthe first magnetic layers 2 a and 2 b are pinned by exchange coupling tothe antiferromagnetic layers.

Concretely, the stacked bodies S23 a and S23 b have, in order from theside of the toroidal magnetic layer 4, the tunnel barrier layers 3 a and3 b, the first magnetic layers 2 a and 2 b, and third magnetic layers 15a and 15 b, respectively. The third magnetic layers 15 a and 15 b haveantiferromagnetism, function so as to pin the magnetization directionsof the first magnetic layers 2 a and 2 b by the action of exchangecoupling to the first magnetic layers 2 a and 2 b, and are made of, forexample, an antiferromagnetic material such as platinum manganese (PtMn)alloy, iridium manganese (IrMn) alloy, iron manganese (FeMn), nickelmanganese (NiMn), or ruthenium manganese (RuMn).

As described above, in the modifications 3 and 4, the stacked bodies S23a and S23 b have, in addition to the configuration of the second orthird embodiment, the third magnetic layers 15 a and 15 b, respectively,which are antiferromagnetic and exchange-coupled to the first magneticlayers 2 a and 2 b on the side opposite to the tunnel barrier layer 3 ofthe first magnetic layers 2 a and 2 b. With the configuration, themagnetization directions of the first magnetic layers 2 a and 2 b can bepinned more stably. Consequently, even when the coercive force of thefirst magnetic layers 2 a and 2 b is set to be less than (50/4π)×10³A/m, the magnetization directions in the connection parts 84 a and 84 bare not disturbed by an unnecessary magnetic field such as an externaldisturbance magnetic field, and writing can be performed more stably.

Modifications 5 and 6

Other modifications (modifications 5 and 6) of the third and fourthembodiments will now be described with reference to FIGS. 39A and 39B.

FIG. 39A shows a sectional configuration of a memory cell 124P asanother modification (modification 5) of the third embodiment, which issimilar to that of FIG. 38A. On the other hand, FIG. 39B shows asectional configuration of a memory cell 124H as another modification(modification 6) of the fourth embodiment, which is similar to that ofFIG. 38B. In FIGS. 39A and 39B, the same reference numerals aredesignated to components substantially the same as those shown in FIGS.38A and 38B.

In a manner similar to the modifications 3 and 4, stacked bodies S24 aand S24 b in the memory cells 124P and 124H of the modifications 5 and 6shown in FIG. 39A have a structure called exchange bias type in whichthe magnetization directions of the first magnetic layers 2 a and 2 bare pinned by exchange coupling to the antiferromagnetic layers.Different from the memory cells 123P and 123H, each of the memory cells124P and 124H has not a single magnetization pinned layer but asynthetic magnetization pinned layer (hereinbelow, called SyAP layer)made of a plurality of layers.

Concretely, the stacked bodies S24 a and S24 b have a structure obtainedby stacking, in order from the side of the toroidal magnetic layer 4,the tunnel barrier layers 3 a and 3 b, the SyAp layers 35 a and 35 b,and the third magnetic layers 15 a and 15 b which are antiferromagnetic.The SyAP layers 35 a and 35 b have a structure obtained by stacking, inorder from the side of the toroidal magnetic layer 4, the first magneticlayers 2 a and 2 b, nonmagnetic conductive layers 16 a and 16 b, andfourth magnetic layers 18 a and 18 b, respectively. The nonmagneticconductive layers 16 a and 16 b are made of, for example, copper. Thefourth magnetic layers 18 a and 18 b are made of, for example, iron(Fe), NiFe, CoFe, NiFeCo, cobalt (Co), or the like and areantiferromagnetically coupled to the first magnetic layers 2 a and 2 b,respectively. The nonmagnetic conductive layers 16 a and 16 b are aconcrete example of a “second nonmagnetic conductive layer” in theinvention.

As described above, in the modifications 5 and 6, the stacked bodies S24a and S24 b have the structure obtained by stacking in order thenonmagnetic conductive layers 16 a and 16 b, fourth magnetic layers 18 aand 18 b, and third magnetic layers 15 a and 15 b on the side oppositeto the tunnel barrier layer 3 of the first magnetic layers 2 a and 2 b.In such a manner, a magnetostatic field generated by the fourth magneticlayers 18 a and 18 b and the first magnetic layers 2 a and 2 b which areantiferromagnetically coupled to each other form a closed magnetic path.Thus, a round of the magnetic field to the connection parts 14 a and 14b as the magneto-sensitive layers can be suppressed, and themagnetization directions of the first magnetic layers 2 a and 2 b asmagnetization pinned layers are further stabilized. Thus, the writingoperation can be performed more stably.

Modifications 7 and 8

Other modifications (modifications 7 and 8) of the first and secondembodiments will now be described with reference to FIGS. 40A and 40B.

FIG. 40A shows a sectional configuration of a memory cell 125P asanother modification (modification 7) of the first embodiment, and FIG.40B shows a sectional configuration of a memory cell 125H as anothermodification (modification 8) of the second embodiment.

As shown in FIGS. 40A and 40B, stacked bodies S25 a and S25 b in thememory cells 125P and 125H of the modifications 7 and 8 have a structurecalled the exchange bias type and have the SyAP layers 35 a and 35 b,respectively. With a configuration, magnetostatic fields generated bythe fourth magnetic layers 18 a and 18 b and the first magnetic layers 2a and 2 b which are antiferromagnetically coupled to each other form aclosed magnetic path. Thus, a round of the magnetic field to theconnection parts 14 a and 14 b as a first magneto-sensitive part and thesecond magnetic layers 8 a and 8 b as a second magneto-sensitive partcan be suppressed, and the magnetization directions of the firstmagnetic- layers 2 a and 2 b as magnetization pinned layers are furtherstabilized. Thus, the writing operation can be performed more stably.

Further, concrete examples in the embodiment will be described.

In the embodiment, the following two samples of the magnetic memorydevice were produced on the basis of the manufacturing method describedin the first embodiment. To be concrete, the samples were samples 1 and2 of magnetic memory devices in each of which a plurality of memorycells 1 each having the sectional structure shown in FIG. 5 werearranged in matrix.

The MR ratio, TMR device resistance, switching current, and adjacentcell inversion current of the magnetic memory devices of the samples 1and 2 were measured. The MR ratio and the TMR device resistance wereobtained by using average values of a pair of TMR devices in a memorycell as measurement values. The current values of the switching currentand the adjacent cell inversion current were measured by passing writecurrents of the same magnitude simultaneously to the write bit line 5and the write word line 6. The results are shown in Table 1. Example 1in Table 1 shows results corresponding to the sample 1, and Example 2shows results corresponding to the sample 2. For comparison of numericalvalues, similar measurement was also performed on the memory cell havingthe structure shown in FIG. 44, and illustrated as a comparative examplein Table 1. The magnetic field applied at the time of measurement was(500/4π)×10 ³ A/m. A memory cell as a comparative example shown in FIG.44 has a one TMR device 120 but does not have a toroidal magnetic layersurrounding the write bit line 105 and the write word line 106.

As shown in Table 1, although there is not a large difference in the MRratio and the TMR device resistance between Examples 1 and 2 and thecomparative example, there was a clear significant difference in theswitching currents and the adjacent cell inversion current.

The switching current is the minimum current value necessary forinverting the magnetization direction in a memory cell to be written.The values of the switching currents in Examples 1 and 2 were smallerthan the value in the comparative example. It means that since themagnetization of the magneto-sensitive layer could be invertedefficiently, a writing operation could be performed even with a smallcurrent. That is, it could be confirmed that when neighboring TMRdevices share part of the toroidal magnetic layer, a large circulatingmagnetic field can be generated even with a small current.

The adjacent cell inversion current denotes a current value of a currentwhich is applied to a memory cell adjacent to a memory cell to bewritten and by which the magnetization direction of the memory cellwhich is not inherently to be written is inverted. As shown in Table 1,it was known that, in Examples 1 and 2, even when write current largerthan that in the comparative example is applied, the magnetizationdirection in the adjacent memory cell is not inverted. It means thatoccurrence of a magnetic field which forms a closed magnetic path andexerts an adverse influence on the adjacent-memory cell can besuppressed.

Although the invention has been described above by the some embodimentsand modifications, the invention is not limited to the embodiments andmodifications but can be variously modified. For example, in theembodiments and the modifications, the Schottky diode 75 is used as arectifying device for preventing back flow. The Schottky diode 75 may bereplaced with a bipolar transistor as a device having the samerectifying action.

FIG. 41 shows the configuration of a main part of a circuit in the casewhere bipolar transistors 76 a and 76 b are provided between the readbit lines 33 a and 33 b and the stacked bodies S20 a and S20 b. FIG. 42shows a sectional structure of the bipolar transistors 76 a and 76 b.The bases B of. the bipolar transistors 76 a and 76 b are connected tothe word decode line 72. The collectors C are connected to the read bitlines 33 a and 33 b via a connection layer 28, and the emitters E areconnected to the stacked bodies S20 a and S20 b via a connection layer27.

FIG. 43 shows the whole readout circuit in the case where the bipolartransistors 76 a and 76 b are provided. In this case, when a controlsignal from the Y-direction address decoder circuit 56A is transmittedto, for example, the sense amplifier circuit 56B of the unit readoutcircuit 80 n, the sense amplifier circuit 56B generates read currents sothat the read currents pass through the read bit lines 33 a and 33 b.The control signal from the Y-direction address decoder circuit 56A isalso transmitted to the read switch 83 n at the same time, and the readswitch 83 n is made conductive. On the other hand, the X-directionaddress decoder circuit 58A generates a control signal so as to select amemory cell 1 m and pass through the word decode line 72 m. When thecontrol signal from the X-direction address decoder circuit 58A istransmitted to the base B of each of the bipolar transistors 76 a and 76b, the collector C and the emitter E are made conductive. As a result,the read current passes through the stacked bodies S20 a and S20 b ofthe memory cell lm and finally flows in the constant current circuit 58Bvia the read switch 83 n. Like the diode 75, the bipolar transistor 76also functions to pass the current in one direction, so that a round ofthe read current as shown in FIG. 46 can be avoided.

As rectifying devices for preventing back flow, as shown in FIG. 44, MOStransistors 77 a and 77 b can be used. In this case, the sources S areconnected to the read bit lines 33 a and 33 b, the drains D areconnected to the TMR films 20 a and 20 b, and a gate G connected to theword decode line 72 is closed, thereby obtaining a conductive state.FIG. 45 shows the whole readout circuit in the case where the MOStransistors 77 a and 77 b are provided. Except for the point that theconductive state is obtained by closing the gate G, the readingoperation in the reading circuit shown in FIG. 45 is similar to that inthe circuit (FIG. 43) using the bipolar transistor 76.

In the embodiment, the case where the write bit line 5 and the writeword line 6 form the parallel part 10 has been described above. Theinvention, however, is not limited to the case but may be applied to acase where the write bit line 5 and the write word line 6 form, forexample, 90°. The case of forming the toroidal magnetic layer 4 so as tosurround the parallel part 10 is more preferable because themagnetization of the magneto-sensitive layer is inverted moreefficiently.

In the embodiment, information of the memory cells 1 is read by using adifferential value of read currents passed to the TMR devices 1 a and 1b as an output. The invention, however, is not limited to theembodiment. For example, it is also possible to make the value of theread current passing through a TMR device output as it is and detect thestate which is either a high-resistance state or a low-resistance state.

As described above, a magnetic memory cell or a magnetic memory deviceof the invention includes: first and second stacked bodies eachincluding a magneto-sensitive layer whose magnetization directionchanges according to an external magnetic field, and constructed so thatcurrent flows in a direction perpendicular to a stack layer surface, anddisposed so that their stack layer surfaces face each other; and atoroidal magnetic layer disposed between the first and second stackedbodies so that the direction along the stack layer surface is set as anaxial direction, and constructed so as to be penetrated by a pluralityof conductors along the axial direction. Consequently, a closed magneticpath can be formed by passing currents to the plurality of conductors(first and second write lines), so that the magnetization of each of themagneto-sensitive layers in the first and second stacked bodies can beinverted efficiently. In particular, in the magnetic memory device ofthe invention including a plurality of magnetic memory cells, a magneticinfluence exerted on a memory cell adjacent to a memory cell to bewritten can be reduced.

In particular, when the first stacked body constructs a firstmagnetoresistive device in cooperation with the toroidal magnetic layer,and the second stacked body constructs a second magnetoresistive devicein cooperation with the toroidal magnetic layer, a pair ofmagnetoresistive devices sharing the toroidal magnetic layer isconstructed, so that the configuration which is more compact than thecase where one toroidal magnetic layer is provided for one stacked bodycan be obtained, and higher packing density can be achieved.

Further, in the magnetic memory cell and the magnetic memory device ofthe invention, when the plurality of conductors (first and second writelines) extend parallel to each other in an area penetrating the toroidalmagnetic layer, a synthetic magnetic field generated in themagneto-sensitive layer by passing currents to the plurality ofconductors (first and second write lines) can be made larger than thatin the case where the conductors cross each other, and the magnetizationin the magneto-sensitive layer can be inverted more efficiently. As aresult, the write current necessary for inverting the magnetization canbe reduced. Further, the magnetization directions of a plurality ofmagnetic domains in the magneto-sensitive layer can be alignedexcellently as a whole, so that higher reliability can be obtained.

When the magnetic memory device of the invention further includes firstand second rectifying devices provided between the pair of first readlines and the first and second stacked bodies on each of current pathsof read currents supplied to the first and second stacked bodies; and asecond read line for leading the read currents passed through the firstand second stacked bodies to the ground, fluctuations caused by a roundof the read current, that is, noise occurring in the read signal can bereduced, so that magnetic information can be read stably.

A method of manufacturing a magnetic memory device of the inventionincludes the steps of forming a second stack layer part as part of thesecond stacked body on a substrate provided with first and secondrectifying devices and electrically connecting the second rectifyingdevice and the second stack layer part; forming a bottom magnetic layerso as to cover at least the stack layer part and completing formation ofthe second stacked body; forming the first write line over the bottommagnetic layer via a first insulating film; forming the second writeline over the first write line via a second insulating film so as toinclude a portion in which the first and second write lines extendparallel to each other; forming a stack layer pattern forming a stacklayer pattern including the portion in which the first and second writelines extend parallel to each other while sandwiching the secondinsulating film by performing patterning by sequentially etching thesecond write line, the second insulating film, and the first write line;forming a toroidal magnetic layer by providing a top magnetic layer soas to surround the stack layer pattern via a third insulating film;forming a first stacked body by providing a first stack layer part in aposition corresponding to the second stacked body over the toroidalmagnetic layer and forming a magnetic memory cell having the first andsecond stacked bodies; and electrically connecting the first stackedbody and the first rectifying device. Consequently, a structure in whichthe toroidal magnetic layer is commonly disposed on a face of one of thefirst and second stacked bodies whose stack layer surfaces face eachother so that the direction along the stack layer surface is used as theaxial direction can be obtained. Moreover, a current path in which apair of read currents flow in the first and second rectifier devices andthe first and second stacked bodies and are combined in the toroidalmagnetic layer can be constructed. Consequently, an unnecessary round ofthe read currents can be avoided, and the magnetic information can beread stably.

In particular, in the stack layer pattern forming steps, when the stacklayer pattern is formed in a self aligned manner by selectively etchingthe second insulating film and the first write line while using thesecond write line as a mask, processing with high alignment precisioncan be performed, and the whole manufacturing process can be simplified.TABLE 1 TMR device Switching Adjacent cell MR resistance currentinversion current ratio % Ω · (μm)² mA mA Example 1 36-38 430-510 1.220.0 or larger Example 2 37-38 480-490 1.1 20.0 or larger Comparative 40520 8.2 13 example

1. A magnetic memory cell comprising: first and second stacked bodieseach including a magneto-sensitive layer whose magnetization directionchanges according to an external magnetic field, and constructed so thatcurrent flows in a direction perpendicular to a stack layer surface, anddisposed so that their stack layer surfaces face each other; and atoroidal magnetic layer disposed between the first and second stackedbodies so that the direction along the stack layer surface is set as anaxial direction, and constructed so as to be penetrated by a pluralityof conductors along the axial direction.
 2. A magnetic memory cellaccording to claim 1, wherein the first stacked body constructs a firstmagnetoresistive device in cooperation with the toroidal magnetic layer,and the second stacked body constructs a second magnetoresistive devicein cooperation with the toroidal magnetic layer.
 3. A magnetic memorycell according to claim 1, wherein each of the first and second stackedbodies is electrically connected to the toroidal magnetic layer.
 4. Amagnetic memory cell according to claim 1, wherein the pluralityconductors extend parallel to each other in an area penetrating thetoroidal magnetic layer.
 5. A magnetic memory cell according to claim 1,wherein the plurality of conductors are disposed so as to be adjacent toeach other in a direction of a straight line passing through the firstand second stacked bodies in an area penetrating the toroidal magneticlayer.
 6. A magnetic memory cell according to claim 1, wherein theplurality of conductors are disposed so as to be adjacent to each otherin a direction orthogonal to a straight line passing through the firstand second stacked bodies in an area penetrating the toroidal magneticlayer.
 7. A magnetic memory cell according to claim 1, whereinmagnetization directions of the magneto-sensitive layers in the firstand second stacked bodies change so as to be antiparallel to each otherby a magnetic field generated by currents flowing in the plurality ofconductors.
 8. A magnetic memory cell according to claim 7, whereineither a first state or a second state is obtained, the first state inwhich one of a pair of magneto-sensitive layers in the first and secondstacked bodies is magnetized in a first direction, and the other ismagnetized in a second direction antiparallel to the first direction,the second state in which one of the magneto-sensitive layers in thepair is magnetized in the second direction and the other is magnetizedin the first direction, and information is stored in the first andsecond stacked bodies in correspondence with the first and secondstates.
 9. A magnetic memory cell according to claim 1, wherein each ofthe pair of magneto-sensitive layers in the first and second stackedbodies includes first and second magneto-sensitive parts constructed soas to be magnetically exchange-coupled to each other, and the firstmagneto-sensitive part is part of the toroidal magnetic layer.
 10. Amagnetic memory cell according to claim 9, wherein each of themagneto-sensitive layers in one pair has a first nonmagnetic conductivelayer for antiferromagnetic-coupling the first and secondmagneto-sensitive parts between the first and second magneto-sensitiveparts.
 11. A magnetic memory cell according to claim 9, wherein thesecond magneto-sensitive part in one pair has a coercive force largerthan that of the first magneto-sensitive part in one pair.
 12. Amagnetic memory cell according to claim 9, wherein each of the first andsecond stacked bodies includes: a nonmagnetic layer; a first magneticlayer stacked on one side of the nonmagnetic layer and whosemagnetization direction is pinned; and a second magnetic layer stackedon the side opposite to the first magnetic layer of the nonmagneticlayer and functioning as the second magneto-sensitive part, andinformation is detected on the basis of currents flowing in the firstand second stacked bodies.
 13. A magnetic memory cell according to claim12, wherein the first magnetic layer has a coercive force larger thanthat of the second magnetic layer.
 14. A magnetic memory cell accordingto claim 12, wherein a third magnetic layer which is antiferromagneticand is exchange-coupled to the first magnetic layer is disposed on theside opposite to the nonmagnetic layer of the first magnetic layer. 15.A magnetic memory cell according to claim 14, wherein a secondnonmagnetic conductive layer and a fourth magnetic layer which isantiferromagnetic-coupled to the first magnetic layer are disposed inorder from the side of the first magnetic layer between the first andthird magnetic layers.
 16. A magnetic memory cell according to claim 12,wherein the nonmagnetic layer is an insulating layer which can produce atunnel effect.
 17. A magnetic memory cell according to claim 1, whereinthe pair of magneto-sensitive layers constructs part of the toroidalmagnetic layer.
 18. A magnetic memory cell according to claim 17,wherein each of the first and second stacked bodies includes: anonmagnetic layer; a first magnetic layer stacked on one side of thenonmagnetic layer and whose magnetization direction is pinned; and themagneto-sensitive layer stacked on the side opposite to the firstmagnetic layer of the nonmagnetic layer, and information is detected onthe basis of currents flowing in the first and second stacked bodies.19. A magnetic memory cell according to claim 18, wherein on the sideopposite to the nonmagnetic layer of the first magnetic layer, a secondnonmagnetic conductive layer, a fourth magnetic layerantiferromagnetic-coupled to the first magnetic layer, and a thirdmagnetic layer which is antiferromagnetic are disposed in order.
 20. Amagnetic memory cell according to claim 18, wherein the nonmagneticlayer is an insulating layer which can produce a tunnel effect.
 21. Amagnetic memory device comprising: a first write line; a second writeline extending so as to cross the first write line; and a magneticmemory cell, wherein the magnetic memory cell comprises: first andsecond stacked bodies each including a magneto-sensitive layer whosemagnetization direction changes according to an external magnetic field,and constructed so that current flows in a direction perpendicular to astack layer surface, and disposed so that their stack layer surfacesface each other; and a toroidal magnetic layer disposed between thefirst and second stacked bodies so that the direction along the stacklayer surface is set as an axial direction, and constructed so as to bepenetrated by the first and second write lines along the axialdirection.
 22. A magnetic memory device according to claim 21, whereinthe first stacked body constructs a first magnetoresistive device incooperation with the toroidal magnetic layer, and the second stackedbody constructs a second magnetoresistive device in cooperation with thetoroidal magnetic layer.
 23. A magnetic memory device according to claim21, wherein each of the first and second stacked bodies is electricallyconnected to the toroidal magnetic layer.
 24. A magnetic memory deviceaccording to claim 21, wherein the first and second write lines extendparallel to each other in an area penetrating the toroidal magneticlayer.
 25. A magnetic memory device according to claim 21, wherein thefirst and second write lines are disposed so as to be adjacent to eachother in a direction of a straight line passing through the first andsecond stacked bodies in an area penetrating the toroidal magneticlayer.
 26. A magnetic memory device according to claim 21, wherein thefirst and second write lines are disposed so as to be adjacent to eachother in a direction orthogonal to a straight line passing through thefirst and second stacked bodies in an area penetrating the toroidalmagnetic layer.
 27. A magnetic memory device according to claim 21,wherein magnetization directions of the magneto-sensitive layers in thefirst and second stacked bodies change so as to be antiparallel to eachother by a magnetic field generated by currents flowing in both of thefirst and second write lines.
 28. A magnetic memory device according toclaim 27, wherein either a first state or a second state is obtained,the first state in which one of a pair of magneto-sensitive layers inthe first and second stacked bodies is magnetized in a first direction,and the other is magnetized in a second direction antiparallel to thefirst direction, the second state in which one of the magneto-sensitivelayers in the pair is magnetized in the second direction and the otheris magnetized in the first direction, and information is stored in themagnetic memory cell in correspondence with the first and second states.29. A magnetic memory device according to claim 21, further comprising apair of first read lines which are connected to the first and secondstacked bodies and supply read current to the stacked bodies, whereininformation is read from the magnetic memory cell on the basis of thecurrent flowing in the stacked bodies.
 30. A magnetic memory deviceaccording to claim 29, wherein read current is supplied from the pair offirst read lines to the first and second stacked bodies and, on thebasis of the difference between a pair of read current values,information is read from the magnetic memory cell.
 31. A magnetic memorydevice according to claim 21, wherein the pair of magneto-sensitivelayers in the first and second stacked bodies have first and secondmagneto-sensitive parts constructed so as to be magneticallyexchange-coupled to each other, and the first magneto-sensitive partconstructs part of the toroidal magnetic layer.
 32. A magnetic memorydevice according to claim 31, wherein the pair of magneto-sensitivelayers has a first nonmagnetic conductive layer forantiferromagnetic-coupling the first and second magneto-sensitive partsbetween the first and second magneto-sensitive parts.
 33. A magneticmemory device according to claim 31, wherein the secondmagneto-sensitive part in one pair has a coercive force larger than thatof the first magneto-sensitive part.
 34. A magnetic memory deviceaccording to claim 31, wherein each of the first and second stackedbodies includes: a nonmagnetic layer; a first magnetic layer stacked onone side of the nonmagnetic layer and whose magnetization direction ispinned; and a second magnetic layer stacked on the side opposite to thefirst magnetic layer of the nonmagnetic layer and finctioning as thesecond magneto-sensitive part, and information is detected on the basisof currents flowing in the first and second stacked bodies.
 35. Amagnetic memory device according to claim 34, wherein the first magneticlayer has a coercive force larger than that of the second magneticlayer.
 36. A magnetic memory device according to claim 34, wherein athird magnetic layer which is antiferromagnetic and is exchange-coupledto the first magnetic layer is disposed on the side opposite to thenonmagnetic layer of the first magnetic layer.
 37. A magnetic memorydevice according to claim 34, wherein a second nonmagnetic conductivelayer and a fourth magnetic layer which is antiferromagnetic-coupled tothe first magnetic layer are disposed in order from the side of thefirst magnetic layer between the first and third magnetic layers.
 38. Amagnetic memory device according to claim 34, wherein the nonmagneticlayer is an insulating layer which can produce a tunnel effect.
 39. Amagnetic memory device according to claim 21, wherein the pair ofmagneto-sensitive layers in the first and second stacked bodiesconstructs part of the toroidal magnetic layer.
 40. A magnetic memorydevice according to claim 39, wherein each of the first and secondstacked bodies includes: a nonmagnetic layer; a first magnetic layerstacked on one side of the nonmagnetic layer and whose magnetizationdirection is pinned; and the magneto-sensitive layer stacked on the sideopposite to the first magnetic layer of the nonmagnetic layer, andinformation is detected on the basis of currents flowing in the firstand second stacked bodies.
 41. A magnetic memory device according toclaim 40, wherein on the side opposite to the nonmagnetic layer of thefirst magnetic layer, a second nonmagnetic conductive layer, a fourthmagnetic layer antiferromagnetic-coupled to the first magnetic layer,and a third magnetic layer which is antiferromagnetic are disposed inorder.
 42. A magnetic memory device according to claim 40, wherein thenonmagnetic layer is an insulating layer which can produce a tunneleffect.
 43. A magnetic memory device according to claim 29, comprising:first and second rectifying devices provided between the pair of firstread lines and the first and second stacked bodies on each of currentpaths of read currents supplied to the first and second stacked bodies;and a second read line for leading the read currents passed through thefirst and second stacked bodies to the ground.
 44. A magnetic memorydevice according to claim 43, wherein each of the first and secondrectifying devices is a Schottky diode, a PN junction diode, a bipolartransistor, or a MOS (Metal-Oxide-Semiconductor) transistor.
 45. Amagnetic memory device according to claim 21, wherein the second stackedbody, the toroidal magnetic layer, and the first stacked body aredisposed in order on a substrate provided with the first and secondrectifying devices, and the first and second rectifying devices and thefirst and second stacked bodies are electrically connected to eachother, respectively.
 46. A magnetic memory device according to claim 45,wherein the first and second rectifying devices are bipolar transistors,and emitters in the bipolar transistors and the first and second stackedbodies are electrically connected to each other.
 47. A magnetic memorydevice according to claim 45, wherein the first and second rectifyingdevices are MOS (Metal-Oxide-Semiconductor) transistors, and sources inthe MOS transistors and the first and second stacked bodies areelectrically connected to each other.
 48. A magnetic memory deviceaccording to claim 45, wherein each of the first and second rectifyingdevices is a Schottky diode, has a conductive layer and an epitaxiallayer in order from the side of the first and second stacked bodies, anda Schottky barrier is formed between the conductive layer and theepitaxial layer.
 49. A method of manufacturing a magnetic memory deviceincluding a first write line, a second write line extending so as tocross the first write line, and a magnetic memory cell having first andsecond stacked bodies including magneto-sensitive layers whosemagnetization directions change according to an external magnetic field,comprising the steps of: forming a second stack layer part as part ofthe second stacked body on a substrate provided with first and secondrectifying devices and electrically connecting the second rectifyingdevice and the second stack layer part; forming a bottom magnetic layerso as to cover at least the stack layer part and completing formation ofthe second stacked body; forming the first write line over the bottommagnetic layer via a first insulating film; forming the second writeline over the first write line via a second insulating film so as toinclude a portion in which the first and second write lines extendparallel to each other; forming a stack layer pattern forming a stacklayer pattern including the portion in which the first and second writelines extend parallel to each other while sandwiching the secondinsulating film by performing patterning by sequentially etching thesecond write line, the second insulating film, and the first write line;forming a toroidal magnetic layer by providing a top magnetic layer soas to surround the stack layer pattern via a third insulating film;forming a first stacked body by providing a first stack layer part in aposition corresponding to the second stacked body over the toroidalmagnetic layer and forming a magnetic memory cell having the first andsecond stacked bodies; and electrically connecting the first stackedbody and the first rectifying device.
 50. A method of manufacturing amagnetic memory device according to claim 49, wherein in the step offorming the stack layer pattern, the stack layer pattern is formed in aself aligned manner by selectively etching the second insulating filmand the first write line by using the second write line as a mask.